US3899743A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Biasing circuit for multistage transistor amplifiers
Assignee: General Electric Co
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Filing: 1974-01-07
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Granted: 1975-08-12
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Expires: 1994-01-07
Abstract
Abstract A novel circuit is disclosed for biasing the first transistor stage of a multistage transistor amplifier. The circuit comprises a semiconductor device, typically a transistor, connected to a feedback relationship between the output and input electrodes of the transistor amplifier for providing the requisite DC current bias to the base of the first transistor stage while maintaining the collector voltage at the output transistor stage substantially constant, independent of varying Beta characteristics of the transistor amplifier.
Inventors
- 👤 Antal Csicsatka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 12:39
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/302; H03F1/34; H03F3/00; H03F3/189; H03F3/19; H03F3/191
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
183 words
In a multistage electronic amplifier having first and last stages comprising first and last transistors, each of said transistors having an impedance for connecting one terminal thereof to a direct current bias potential source, a circuit for biasing an input terminal of said first transistor comprising: a multiterminal semiconductor device developing a substantially constant direct current voltage between two terminals thereof, means for connecting a first terminal of said two terminals of said multiterminal semiconductor device to said one terminal of said last transistor, first and second resistors connected in series between an input terminal of said first transistor and a common point, said first and second resistors having a common terminal mediate said first and second resistors, the second terminal of said two terminals of said multiterminal semiconductor device being connected to said mediate terminal, said multiterminal semiconductor device having a third terminal arranged for connection to a direct current bias potential source, said multiterminal semiconductor device being operative to cause a current to flow into said input terminal of said first transistor to cause said first transistor to be rendered active.
Claim 2
Dependent Claim
183 words
In a multistage electronic amplifier having first and last stages comprising first and last transistors, each of said transistors having an impedance for connecting one terminal thereof to a direct current bias potential source, a circuit for biasing an input terminal of said first transistor comprising: a multiterminal semiconductor device developing a substantially constant direct current voltage between two terminals thereof, means for connecting a first terminal of said two terminals of said multiterminal semiconductor device to said one terminal of said last transistor, first and second resistors connected in series between an input terminal of said first transistor and a common point, said first and second resistors having a common terminal mediate said first and second resistors, the second terminal of said two terminals of said multiterminal semiconductor device being connected to said mediate terminal, said multiterminal semiconductor device having a third terminal arranged for connection to a direct current bias potential source, said multiterminal semiconductor device being operative to cause a current to flow into said input terminal of said first transistor to cause said first transistor to be rendered active.
Claim 3
Dependent Claim
13 words
The combination of claim 1 wherein said multiterminal semiconductor device is a transistor.
Claim 4
Dependent Claim
21 words
The combination of claim 2 wherein said first terminal of said multiterminal semiconductor device is the base terminal of said transistor.
Claim 5
Dependent Claim
21 words
The combination of claim 3 wherein sais second terminal of said multiterminal semiconductor device is the emitter terminal of said transistor.
Claim 6
Dependent Claim
21 words
The combination of claim 4 wherein said third terminal of said multiterminal semiconductor device is the collector terminal of said transistor.
Claim 7
Dependent Claim
185 words
In a multistage electronic amplifier having first and last stages comprising first and last transistors, each of said transistors having an impedance for connecting one terminal thereof to a direct current bias potential source, a circuit for biasing an input terminal of said first transistor comprising: a multiterminal semiconductor device developing a substantially constant direct current voltage between two terminals thereof, means for connecting a first terminal of said two terminals of said multiterminal semiconductor device to said one terminal of said last transistor, first and second resistors connected in series between the second terminal of said two terminals of said multiterminal semiconductor device and a common point, said first and second resistors having a common terminal mediate said first and second resistors, means connecting an input terminal of said first transistor to said mediate terminal, said multiterminal semiconductor device having a third terminal arranged for connection to a direct current bias potential source whereby said multiterminal semiconductor device provides a current to said input terminal of said first transistor by means one of said resistors to cause said first transistor to be rendered active.
Claim 8
Dependent Claim
185 words
In a multistage electronic amplifier having first and last stages comprising first and last transistors, each of said transistors having an impedance for connecting one terminal thereof to a direct current bias potential source, a circuit for biasing an input terminal of said first transistor comprising: a multiterminal semiconductor device developing a substantially constant direct current voltage between two terminals thereof, means for connecting a first terminal of said two terminals of said multiterminal semiconductor device to said one terminal of said last transistor, first and second resistors connected in series between the second terminal of said two terminals of said multiterminal semiconductor device and a common point, said first and second resistors having a common terminal mediate said first and second resistors, means connecting an input terminal of said first transistor to said mediate terminal, said multiterminal semiconductor device having a third terminal arranged for connection to a direct current bias potential source whereby said multiterminal semiconductor device provides a current to said input terminal of said first transistor by means one of said resistors to cause said first transistor to be rendered active.
Claim 9
Dependent Claim
151 words
In a multistage electronic amplifier having first and last stages comprising first and last transistors, each of said transistors having an impedance for connecting one terminal thereof to a direct current bias potential source, a circuit for biasing an input terminal of said first transistor comprising: a multiterminal semiconductor device developing a substantially constant direct current voltage between two terminals thereof, means connecting one terminal of said two terminals of said multiterminal semiconductor device to said oNe terminal of said last transistor, a first resistance path connecting the second terminal of said two terminals of said multiterminal semiconductor device to an input terminal of said first transistor to supply a first fraction of the current flowing from said second terminal to said input terminal, a second resistance path connecting said second terminal to a common point to conduct to ground the remaining fraction of said current flowing from said second terminal.
Claim 10
Dependent Claim
151 words
In a multistage electronic amplifier having first and last stages comprising first and last transistors, each of said transistors having an impedance for connecting one terminal thereof to a direct current bias potential source, a circuit for biasing an input terminal of said first transistor comprising: a multiterminal semiconductor device developing a substantially constant direct current voltage between two terminals thereof, means connecting one terminal of said two terminals of said multiterminal semiconductor device to said oNe terminal of said last transistor, a first resistance path connecting the second terminal of said two terminals of said multiterminal semiconductor device to an input terminal of said first transistor to supply a first fraction of the current flowing from said second terminal to said input terminal, a second resistance path connecting said second terminal to a common point to conduct to ground the remaining fraction of said current flowing from said second terminal.
Claim 11
Dependent Claim
23 words
The combination of claim 7 wherein said multiterminal semiconductor has a third terminal arranged for connection to a direct current bias potential source.
References Cited (Backward Citations)
US2916565A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-08-11 | 1979-02-10 | 1979-08-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-08-11 | 1983-02-10 | 1983-08-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-08-11 | 1987-02-10 | 1987-08-12 | $7700.00 | Window Closed / Lapsed |