System for monitoring and indicating peak values of a time varying signal

Claim 1

A system for monitoring and indicating peak values of a time varying signal comprising: an input amplifier for receiving and amplifying said signals; rectifying means, fed from said input amplifier and providing a rectified output; peak detector means, receiving said rectified output and retaining peak values of said rectified output and providing said peak values at its output; a voltage source in series with a potential divider having a plurality of output terminals for providing a different reference value at each said output terminal; comparator means comprising a plurality of differential amplifiers, each differential amplifier having a first input terminal and a second input terminal and a first output terminal; said peak detector means output being connected to all of said first input terminals; a different one of said output terminals of said potential divider being connected to a different one of each of said second input terminals; the first output terminal of said differential amplifiers providing a display driving signal; and display means comprising a numerical display for indicating the highest peak value attained in a series of observations, and a moving dot display for indicating ongoing peak values in said series.

Claim 2

A system for monitoring and indicating peak values of a time varying signal comprising: an input amplifier for receiving and amplifying said signals; rectifying means, fed from said input amplifier and providing a rectified output; peak detector means, receiving said rectified output and retaining peak values of said rectified output and providing said peak values at its output; a voltage source in series with a potential divider having a plurality of output terminals for providing a different reference value at each said output terminal; comparator means comprising a plurality of differential amplifiers, each differential amplifier having a first input terminal and a second input terminal and a first output terminal; said peak detector means output being connected to all of said first input terminals; a different one of said output terminals of said potential divider being connected to a different one of each of said second input terminals; the first output terminal of said differential amplifiers providing a display driving signal; and display means comprising a numerical display for indicating the highest peak value attained in a series of observations, and a moving dot display for indicating ongoing peak values in said series.

Claim 10

A system for monitoring and indicating peak values of an audio signal comprising; input means comprising a first differential amplifier having an output terminal and two input terminals to receive a balanced input of said audio signal; rectifying means comprising a second differential amplifier having an input terminal and an output terminal; the input terminal of said second differential amplifier being connected to the output terminal of said first differential amplifier; a diode in a feedback path between said output terminal of said second differential amplifier and said input terminal; a third differential amplifier having an input terminal and an output terminal; a second diode between the output terminal of said second differential amplifier and the input terminal of said third differential amplifier; peak detector means comprising a first operational amplifier with a gain of 1 to two input terminals and an output terminal; one input terminal of said operational amplifier being connected to the output terminal of said third differential amplifier; The output terminal of said first operational amplifier being connected to the other input terminal of said first operational amplifier through a third diode; a first resistor at the junction of said input terminal of said first operational amplifier and said third diode; a capacitor in series with a first resistor; and a second resistor in parallel with said capacitor; an output of said peak detector means being taken at the junction of said first resistor and said capacitor; reference sources comprising a voltage source in series with a potential divider having a plurality of output terminals; and comparator means comprising a plurality of further differential amplifiers, each having a first input terminal and a second input terminal and a first output terminal and a clamp output terminal; said peak detector means output being connected to all of said first input terminals of said further differential amplifiers; a different one of said output terminals of said potential divider being connected to a different one of each of said second input terminals of said further differential amplifiers; a plurality of SR flip-flops, equal to the plurality of further differential amplifiers, each flip-flop comprising a SET terminal, a RESET terminal, a Q output terminal, and a Q output terminal; the clamp output terminal of each further differential amplifier being connected to the SET terminal of a respective flip-flop; a reset switch connected to the RESET terminals of all of said plurality of SR flip-flops; a plurality of AND gates having two input terminals and an output terminal; said plurality of AND gates being one less than the plurality of further differential amplifiers; said comparator comprising a first further differential amplifier, a first SR flip-flop and a first AND gate associated with a first stage of said comparator; a last further differential amplifier and a last SR flip-flop associated with a last stage of said comparator; the remaining further differential amplifiers, SR flip-flops and AND gates being associated in respective intermediate stages of said comparator; the Q output terminals of the SR flip-flops associated with all stages except the last stage being connected to a first input of the AND gate of said stage; the Q output terminals of the SR flip-flops associated with all stages except the first stage being connected to the second input of the AND gate of an earlier stage; said system further comprising display means including a numerical display for indicating the highest peak value attained in a series of observations, and a moving dot display for indicating ongoing peak values in said series; decoder means between said comparator means and said numerical display for providing a driving signal for said first stationary numerical display; the output terminals of each said AND gates being fed to said decoder means; the Q output terminal of said SR flip-flop of said last stage being also fed to said decoder means; and the output of each further differential amplifier being fed to a separate LED, the plurality of LEDS comprising said moving dot display.

Claim 11

A system for monitoring and indicating peak values of an audio signal comprising; input means comprising a first differential amplifier having an output terminal and two input terminals to receive a balanced input of said audio signal; rectifying means comprising a second differential amplifier having an input terminal and an output terminal; the input terminal of said second differential amplifier being connected to the output terminal of said first differential amplifier; a diode in a feedback path between said output terminal of said second differential amplifier and said input terminal; a third differential amplifier having an input terminal and an output terminal; a second diode between the output terminal of said second differential amplifier and the input terminal of said third differential amplifier; peak detector means comprising a first operational amplifier with a gain of 1 to two input terminals and an output terminal; one input terminal of said operational amplifier being connected to the output terminal of said third differential amplifier; The output terminal of said first operational amplifier being connected to the other input terminal of said first operational amplifier through a third diode; a first resistor at the junction of said input terminal of said first operational amplifier and said third diode; a capacitor in series with a first resistor; and a second resistor in parallel with said capacitor; an output of said peak detector means being taken at the junction of said first resistor and said capacitor; reference sources comprising a voltage source in series with a potential divider having a plurality of output terminals; and comparator means comprising a plurality of further differential amplifiers, each having a first input terminal and a second input terminal and a first output terminal and a clamp output terminal; said peak detector means output being connected to all of said first input terminals of said further differential amplifiers; a different one of said output terminals of said potential divider being connected to a different one of each of said second input terminals of said further differential amplifiers; a plurality of SR flip-flops, equal to the plurality of further differential amplifiers, each flip-flop comprising a SET terminal, a RESET terminal, a Q output terminal, and a Q output terminal; the clamp output terminal of each further differential amplifier being connected to the SET terminal of a respective flip-flop; a reset switch connected to the RESET terminals of all of said plurality of SR flip-flops; a plurality of AND gates having two input terminals and an output terminal; said plurality of AND gates being one less than the plurality of further differential amplifiers; said comparator comprising a first further differential amplifier, a first SR flip-flop and a first AND gate associated with a first stage of said comparator; a last further differential amplifier and a last SR flip-flop associated with a last stage of said comparator; the remaining further differential amplifiers, SR flip-flops and AND gates being associated in respective intermediate stages of said comparator; the Q output terminals of the SR flip-flops associated with all stages except the last stage being connected to a first input of the AND gate of said stage; the Q output terminals of the SR flip-flops associated with all stages except the first stage being connected to the second input of the AND gate of an earlier stage; said system further comprising display means including a numerical display for indicating the highest peak value attained in a series of observations, and a moving dot display for indicating ongoing peak values in said series; decoder means between said comparator means and said numerical display for providing a driving signal for said first stationary numerical display; the output terminals of each said AND gates being fed to said decoder means; the Q output terminal of said SR flip-flop of said last stage being also fed to said decoder means; and the output of each further differential amplifier being fed to a separate LED, the plurality of LEDS comprising said moving dot display.