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US3896301A Expired / Lapsed US ⏱️ 0.0 years remaining

Solid state dc times ac multiplier

Assignee: Bendix Corp
•
Filing: 1974-01-11
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Granted: 1975-07-22
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Expires: 1994-01-11
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Abstract

Abstract A d.c. times a.c. multiplier utilizes the essentially pure resistive characteristics of a photocell, such as a cadmium sulfide photocell, to allow a.c. and d.c. component signals to be applied to the multiplier without interaction. The product is fed back as one input to an integrator, which essentially acts as a low pass filter, while the d.c. multiplicand is applied as a second input thereto. The integrator output controls the relative light output of a pair of serially connected light emitting diodes which are light coupled respectively to a pair of serially connected photocells which determine the gain of the a.c. multiplicand.

Inventors

  • 👤 Vincent A Resta

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 02:50
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/16; G06G7/163; G01; G01S; G01S1/00; G01S1/02

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 221 words
Means for multiplying a first quantity by a second quantity wherein at least said first quantity is represented by a first d.c. signal and said second quantity is represented by an a.c. signal + a D.C. reference and the a.c. signal + the D.C. reference inverted, comprising: a voltage source; a pair of light emitting means having a common junction point and connected in series across said voltage source; a pair of light responsive resistive means having a common junction point and connected in series between said a.c. signal + a D.C. reference and said a.c. signal + a D.C. reference inverted; an output terminal upon which an output signal related to the product of said first quantity and said second quantity is generated; means for connecting the junction point of said pair of light responsive means to said output terminal; and, first means responsive to the d.c. component of siad output signal and said first d.c. signal for generating a second signal related to the difference thereof, said pair of light emitting means being responsive to said second signal whereby the ratio of light emitted by said light emitting means with respect to one another is controlled, the ratio of the resistance of said light responsive resistive means with respect to one another being controlled by said ratio of light.
Claim 2
Dependent Claim 221 words
Means for multiplying a first quantity by a second quantity wherein at least said first quantity is represented by a first d.c. signal and said second quantity is represented by an a.c. signal + a D.C. reference and the a.c. signal + the D.C. reference inverted, comprising: a voltage source; a pair of light emitting means having a common junction point and connected in series across said voltage source; a pair of light responsive resistive means having a common junction point and connected in series between said a.c. signal + a D.C. reference and said a.c. signal + a D.C. reference inverted; an output terminal upon which an output signal related to the product of said first quantity and said second quantity is generated; means for connecting the junction point of said pair of light responsive means to said output terminal; and, first means responsive to the d.c. component of siad output signal and said first d.c. signal for generating a second signal related to the difference thereof, said pair of light emitting means being responsive to said second signal whereby the ratio of light emitted by said light emitting means with respect to one another is controlled, the ratio of the resistance of said light responsive resistive means with respect to one another being controlled by said ratio of light.
Claim 3
Dependent Claim 64 words
The means for multiplying of claim 1 wherein said pair of light emitting means comprises first and second light emitting diodes and wherein said pair of light responsive resistive means comprises first and second photocells, said first photocell being exclusively exposed to light from said first light emitting diode and said second photocell being exclusively exposed to light from said second light emitting diode.
Claim 4
Dependent Claim 21 words
The means for multiplying of claim 2 wherein said first and second photocells comprise first and second cadmium sulfide photocells respectively.
Claim 5
Dependent Claim 16 words
The means for multiplying of claim 1 wherein said light emitting means comprise light emitting diodes.
Claim 6
Dependent Claim 16 words
The means for multiplying of claim 1 wherein said light responsive means comprise cadmium sulfide photocells.
Claim 7
Dependent Claim 17 words
The means for multiplying of claim 1 wherein said means for connecting comprises a unity buffer amplifier.
Claim 8
Dependent Claim 51 words
The means for multiplying of claim 1 wherein said first means comprises an operational amplifier means having first and second input ports and connected as a low pass filter, said output signal being connected to said first input port and said first d.c. signal being connected to said second input port.
Claim 9
Dependent Claim 60 words
The means for multiplying of claim 1 including a source of a second d.c. signal and additionally including: a free running multivibrator for generating a first frequency signal; and, second means responsive to said second d.c. signal and said first frequency signal for generating said a.c. signal + a D.C. reference and said a.c. signal + a D.C. reference inverted.
Claim 10
Dependent Claim 45 words
The means for multiplying of claim 8 wherein said second means comprises: chopper means responsive to said first frequency signal and said second d.c. signal for generating said a.c. signal; and, inverting means responsive to the generated a.c. signal for generating said a.c. signal inverted.
Claim 11
Dependent Claim 59 words
The means for multiplying of claim 8 wherein said free-running multivibrator additionally generates a second frequency signal displaced 180* from said first frequency signal and additionally comprising synchronous detector means responsive to said second frequency signal and the output signal at said output terminal for providing a signal correlated to the product of said first and second d.c. signals.
Claim 12
Dependent Claim 44 words
The means for multiplying of claim 10 with additionally low pass filter means responsive to said signal correlated to the product of said first and second d.c. signals for producing a d.c. signal correlated to the product of said first and second d.c. signals.

References Cited (Backward Citations)

US3193672A Cited
US3215824A Cited
US3283135A Cited
US3384739A Cited
US3448297A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-07-21 1979-01-20 1979-07-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-07-21 1983-01-20 1983-07-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-07-21 1987-01-20 1987-07-22 $7700.00 Window Closed / Lapsed

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