US3893072A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Error correction system
Assignee: International Data Sciences Inc
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Filing: 1973-08-03
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Granted: 1975-07-01
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Expires: 1993-08-03
Abstract
Abstract An error correction system for correcting received erroneous data transmitted from one site of a data link and detected as being received erroneously at a second site of said data link, said error correction system having at each site an encoder for adding an error detecting code to data, a decoder for detecting the code and inserting an error correct signal in data being transmitted in the reverse direction from said second site upon detection of an error in received data at said second site, said decoder at each site also providing instructions at said site upon detection of the error correct signal to cause error injection as well as retransmission of the same data previously detected as being incorrect, the preferred embodiment also includes an elastic memory which acts as a speed converter for the Time Division Multiplexer input thereto. In addition, the preferred embodiment also includes the capability of injecting errors to refill the elastic memory as well as the capability of sending uncorrected data if the correcting capability of the system is exceeded.
Inventors
- 👤 Antonio Renato A D
- 👤 Alejandro B Marton
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 18:55
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/12; H04L1/16; H04L1/18; H04L1/1812; H04L1/1819; G; G08; G08C; G08C25/00; G08C25/02; H04L1/1809; H04L1/1816; H04L1/1829; H04L1/1835; H04L1/1845
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
43 words
In an error correction subsystem, first means for generating redundancy signals based on blocks of data signals to be transmitted, second means for injecting an error into said signals, and in which said second means for injecting an error inverts the redundancy signals.
Claim 2
Dependent Claim
43 words
In an error correction subsystem, first means for generating redundancy signals based on blocks of data signals to be transmitted, second means for injecting an error into said signals, and in which said second means for injecting an error inverts the redundancy signals.
Claim 3
Dependent Claim
80 words
In an error correction subsystem, first means for generating redundancy signals based on blocks of data to be transmitted, second means for injecting an error into said redundancy signals, third means for recognizing a received request retransmission signal and controlling the injection of an error into said redundancy signals, means for transmitting blocks of data previously transmitted upon recognition of a received request retransmission signal, and first in first out storage means for storing blocks of data to be transmitted.
Claim 4
Dependent Claim
80 words
In an error correction subsystem, first means for generating redundancy signals based on blocks of data to be transmitted, second means for injecting an error into said redundancy signals, third means for recognizing a received request retransmission signal and controlling the injection of an error into said redundancy signals, means for transmitting blocks of data previously transmitted upon recognition of a received request retransmission signal, and first in first out storage means for storing blocks of data to be transmitted.
Claim 5
Dependent Claim
37 words
In an error correction subsystem according to claim 2 in which first in first out storage means receives blocks of data at its input at a slower rate than it provides blocks of data at its output.
Claim 6
Dependent Claim
61 words
In an error correction sybsystem according to claim 3 in which means is provided for monitoring the number of blocks of data in said first in first out storage means to provide a control signal to said second means in the event the number of blocks of data in said first in first out storage means falls below a predetermined number.
Claim 7
Dependent Claim
43 words
In an error correction subsystem according to claim 4 including timing means as a part of the subsystem for generating a pair of clock signals for said first in first out storage means, one clock signal at a slower rate than the other.
Claim 8
Dependent Claim
38 words
In an error correction subsystem according to claim 2 wherein said subsystem includes means for preventing the output of a block of data from said first in first out storage means after receipt of a request retransmission signal.
Claim 9
Dependent Claim
34 words
In an error correction subsystem according to claim 2 wherein said subsystem includes selector means for providing either previously transmitted blocks of data or blocks of data to be transmitted to said first means.
Claim 10
Dependent Claim
55 words
In an error correction subsystem according to claim 2 wherein said subsystem includes a first storage means which is responsive to the detection of a request retransmission signal to cause blocks of data in said first storage means to be transmitted prior to additional data from said first in first out storage means being transmitted.
Claim 11
Dependent Claim
82 words
In an error correction subsystem, first means for generating the redundancy signals from the received block of data, second means for comparing received redundancy signals sent with said data block and said generated redundancy signals to generate a comparison signal which indicates if the data is correct or incorrect, first storage means for storing received data, third means for inhibiting error comparison in the event that the number of blocks of data in said first storage means falls below a predetermined number.
Claim 12
Dependent Claim
82 words
In an error correction subsystem, first means for generating the redundancy signals from the received block of data, second means for comparing received redundancy signals sent with said data block and said generated redundancy signals to generate a comparison signal which indicates if the data is correct or incorrect, first storage means for storing received data, third means for inhibiting error comparison in the event that the number of blocks of data in said first storage means falls below a predetermined number.
Claim 13
Dependent Claim
199 words
An erroR correction system comprising a data source at site 1, first means for transmitting blocks of data bits and redundancy bits to site 2, first means at site 2 for receiving said data bits and said redundancy bits, second means at site 2 for deriving redundancy bits from said data, third means for comparing said received redundancy bits with said derived redundancy bits and providing a request retransmission signal in the event said derived and received redundancy signals do not agree, fourth means for transmitting said request retransmission signal to said site 1, second means at site 1 for detecting said request retransmission signal, third means at site 1 for response to said request retransmission signal for injecting an error into transmitted redundancy bits, in which an error is injected into said redundancy bits by inverting one or more of said bits, including means at site 1 for retransmitting two blocks of data bits previously transmitted, and including means at site 1 for allowing the transmission of data from the data source to a storage means at site 1 storing same at site 1 for transmission while the two blocks of data bits previously transmitted are being retransmitted.
Claim 14
Dependent Claim
199 words
An erroR correction system comprising a data source at site 1, first means for transmitting blocks of data bits and redundancy bits to site 2, first means at site 2 for receiving said data bits and said redundancy bits, second means at site 2 for deriving redundancy bits from said data, third means for comparing said received redundancy bits with said derived redundancy bits and providing a request retransmission signal in the event said derived and received redundancy signals do not agree, fourth means for transmitting said request retransmission signal to said site 1, second means at site 1 for detecting said request retransmission signal, third means at site 1 for response to said request retransmission signal for injecting an error into transmitted redundancy bits, in which an error is injected into said redundancy bits by inverting one or more of said bits, including means at site 1 for retransmitting two blocks of data bits previously transmitted, and including means at site 1 for allowing the transmission of data from the data source to a storage means at site 1 storing same at site 1 for transmission while the two blocks of data bits previously transmitted are being retransmitted.
Claim 15
Independent Claim
109 words
A method of correcting errors in data which comprises the steps of transmitting a block of data and redundancy bits, receiving said block of data and redundancy bits, recalculating the redundancy bits for said received data and comparing said received redundancy bits and recalculated redundancy bits, generating a request or no request retransmission signal based on the comparison of said received and recalculated redundancy bits which indicates if the block of data bits is correct and the step of storing the block of data bits to be transmitted at a slower rate than the rate at which the block of data bits are pulled out of storage for transmitting.
Claim 16
Independent Claim
109 words
A method of correcting errors in data which comprises the steps of transmitting a block of data and redundancy bits, receiving said block of data and redundancy bits, recalculating the redundancy bits for said received data and comparing said received redundancy bits and recalculated redundancy bits, generating a request or no request retransmission signal based on the comparison of said received and recalculated redundancy bits which indicates if the block of data bits is correct and the step of storing the block of data bits to be transmitted at a slower rate than the rate at which the block of data bits are pulled out of storage for transmitting.
Claim 17
Independent Claim
140 words
A method of correcting errors in data which comprise the steps of transmitting a block of data and redundancy bits, receiving said block of data and redundancy bits, recalculating the redundancy bits for said received data and comparing said received redundancy bits and said recalculated redundancy bits, generating a request or no request retransmission signals based on the comparison of said received and recalculated redundancy bits which indicates if the block of data bits is correct, storing the blocks of data bits to be transmitted at a slower rate than the rate at which the blocks of data bits are pulled out of storage, and detecting the number of blocks of received data tibs held within storage and injecting an error into said block of bits transmitted if the number of blocks of data in storage reaches a predetermined number.
Claim 18
Independent Claim
140 words
A method of correcting errors in data which comprise the steps of transmitting a block of data and redundancy bits, receiving said block of data and redundancy bits, recalculating the redundancy bits for said received data and comparing said received redundancy bits and said recalculated redundancy bits, generating a request or no request retransmission signals based on the comparison of said received and recalculated redundancy bits which indicates if the block of data bits is correct, storing the blocks of data bits to be transmitted at a slower rate than the rate at which the blocks of data bits are pulled out of storage, and detecting the number of blocks of received data tibs held within storage and injecting an error into said block of bits transmitted if the number of blocks of data in storage reaches a predetermined number.
Claim 19
Independent Claim
141 words
A method of correcting errors in data which comprise the steps of transmitting a block of data and redundancy bits, receiving said block of data and redundancy bits, recalculating the redundancy bits for said received data and comparing said received redundancy bits and said recalculated redundancy bits, generating a request or no request retransmission signals based on the comparison of said received and recalculated redundancy bits which indicates if the block of data bits is correct, detecting said request retransmission signal and injecting an error into the redundancy bits of the next block of data and redundancy bits to be transmitted and storing the blocks of received data and preventing the detection of an error in the redundancy bits received with said received blocks of data in the event the number of blocks of stored data falls below a predetermined number.
Claim 20
Independent Claim
141 words
A method of correcting errors in data which comprise the steps of transmitting a block of data and redundancy bits, receiving said block of data and redundancy bits, recalculating the redundancy bits for said received data and comparing said received redundancy bits and said recalculated redundancy bits, generating a request or no request retransmission signals based on the comparison of said received and recalculated redundancy bits which indicates if the block of data bits is correct, detecting said request retransmission signal and injecting an error into the redundancy bits of the next block of data and redundancy bits to be transmitted and storing the blocks of received data and preventing the detection of an error in the redundancy bits received with said received blocks of data in the event the number of blocks of stored data falls below a predetermined number.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-06-30 | 1978-12-30 | 1979-07-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-06-30 | 1982-12-30 | 1983-07-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-06-30 | 1986-12-30 | 1987-07-01 | $7700.00 | Window Closed / Lapsed |