US3890496A
Expired / Lapsed
US
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Variable 8421 BCD multiplier
Assignee: SP-MICROWAVE Inc
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Filing: 1974-04-01
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Granted: 1975-06-17
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Expires: 1994-04-01
Abstract
Abstract An 8421 BCD multiplier multiplies a variable multiplicand by a variable multiplier and adds a variable carry in one operation. A matrix of AND gates provides a combination of signals uniquely determined by the values of the multiplicand and multiplier. The signals from the matrix are added to the carry signals in an adder bank and re-converted into the 8421 BCD format in a stepped group of converter units.
Inventors
- 👤 Julian T Hartzog
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 22:48
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/491; G06F7/4915
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
359 words
An 8421 BCD digital multiplier comprising matrix means, means for applying multiplicand and multiplier input signal bits in the 8421 BCD format to the matrix means, a plurality of dual input gating means in said matrix means, each gating means being connected to receive a different combination of single multiplicand and single multiplier signal bits, each of said gating means providing an individual signal when both of its input terminals are energized, said individual signals being assigned a numerical value equal to the product of the numerical values of the single signal bits applied to the input terminals of that gating means, means to receive carry signal bits in the 8421 BCD format, an adder bank, means in said adder bank for adding individual signals of like numerical value from said matrix means to individual simultaneously received carry signal bits of like numerical value, said adder bank having a plurality of output terminals for providing intermediate output signals comprised of individual bits having assigned values arranged in the binary format, data conversion means including a series of connector units for converting the binary output signals from said adder bank into output signal bits in the 8421 BCD format, each of said converter units including a plurality of input terminals for receiving individual bits of information and a plurality of output terminals for providing individual output bits in a given decade of the 8421 BCD format, plus a carry bit in the next higher decade of the same format, said series of converter units beiNg arranged in a stepped fashin in which the first unit in said series is connected to receive a group of the highest valued bits from said adder bank and each succeeding converter unit is connected to receive all bits except the carry bit from the preceding converter unit as well as the next lower valued bit from the adder bank, the carry bit output terminal on each of said converter units being connected directly to an individual output terminal of the digital multiplier, the output terminals on the last unit in said series being connected directly to an individual output terminal of the digital multiplier.
Claim 2
Dependent Claim
359 words
An 8421 BCD digital multiplier comprising matrix means, means for applying multiplicand and multiplier input signal bits in the 8421 BCD format to the matrix means, a plurality of dual input gating means in said matrix means, each gating means being connected to receive a different combination of single multiplicand and single multiplier signal bits, each of said gating means providing an individual signal when both of its input terminals are energized, said individual signals being assigned a numerical value equal to the product of the numerical values of the single signal bits applied to the input terminals of that gating means, means to receive carry signal bits in the 8421 BCD format, an adder bank, means in said adder bank for adding individual signals of like numerical value from said matrix means to individual simultaneously received carry signal bits of like numerical value, said adder bank having a plurality of output terminals for providing intermediate output signals comprised of individual bits having assigned values arranged in the binary format, data conversion means including a series of connector units for converting the binary output signals from said adder bank into output signal bits in the 8421 BCD format, each of said converter units including a plurality of input terminals for receiving individual bits of information and a plurality of output terminals for providing individual output bits in a given decade of the 8421 BCD format, plus a carry bit in the next higher decade of the same format, said series of converter units beiNg arranged in a stepped fashin in which the first unit in said series is connected to receive a group of the highest valued bits from said adder bank and each succeeding converter unit is connected to receive all bits except the carry bit from the preceding converter unit as well as the next lower valued bit from the adder bank, the carry bit output terminal on each of said converter units being connected directly to an individual output terminal of the digital multiplier, the output terminals on the last unit in said series being connected directly to an individual output terminal of the digital multiplier.
Claim 3
Dependent Claim
110 words
The digital multiplier of claim 1 wherein signal bits appearing at each output terminal except the carry terminal on a given converter unit are assigned the same numerical value as that of the input bits applied to a corresponding input terminal on a same converter unit, each of said converter units further containing logic and switching means for adding a signal to the output terminals of the converter in response to the appearance of a carry signal in that converter, said added signal having a numerical value equal to the sum of the values assigned to output bits appearing on the two lowest ordered output terminals of the same converter.
Claim 4
Dependent Claim
55 words
The digital multiplier of claim 2 wherein said matrix means for providing individual signals includes an array of AND gates, each being coupled to receive a unique combination of first and second signal bits from simultaneously received multiplicand and multiplier signals respectively, each of said AND gates further providing individual signals to said adder bank.
Claim 5
Dependent Claim
34 words
The digital multiplier of claim 3 wherein said matrix means receives single decade multiplicand and multiplier signals and said adder bank receives single decade carry signals, said series of converter units containing four units.
Claim 6
Dependent Claim
64 words
The digital multiplier of claim 4 wherein the first converter unit in said series receives output signals representing the three highest valued bits in an intermediate output signal from the adder bank, said first converter unit further having three output terminals directly connected to the succeeding converter unit whereby a 3-bit output signal may be coupled to the succeeding converter unit in said series.
Claim 7
Dependent Claim
43 words
The digital multiplier of claim 5 wherein each converter unit except the first unit is connected to receive 3-bits from the preceding converter on its highest valued input terminals and a bit directly from the adder bank on its lowest valued input terminal.
Claim 8
Dependent Claim
21 words
The digital multiplier of claim 6 wherein the output signal bit representing one unit is derived directly from said adder bank.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-06-16 | 1978-12-16 | 1979-06-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-06-16 | 1982-12-16 | 1983-06-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-06-16 | 1986-12-16 | 1987-06-17 | $7700.00 | Window Closed / Lapsed |