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US3889188A Expired / Lapsed US ⏱️ 0.0 years remaining

Time zero determination of FET reliability

Assignee: International Business Machines Corp
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Filing: 1973-07-30
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Granted: 1975-06-10
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Expires: 1993-07-30
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Abstract

Abstract A method for accurately predicting expected failure rates of field effect devices of a particular design for a product being manufactured without extended burn-in or life tests for each device manufactured. The method relies on the determination that there is a specific relationship between the average percentage of devices failing at a high stress applied essentially at time zero and the average percentage of devices failing at a much lower constant stress, for example, in an application environment. The method comprises the steps of determining the average percentage of a first sample of devices which exhibit dielectric breakdown after a short current-limited voltage stress sufficient to cause normally good devices to go into saturation, determining the average percentage of a second sample of devices which exhibit dielectric breakdown after an extended low voltage stress, correlating the percentage of devices exhibiting dielectric breakdown under each stress condition to determine the specific relationship between the percentages and thereafter predicting the percentage of devices expected to exhibit breakdown at an extended period of time by determining the average percentage of devices manufactured under slightly different manufacturing conditions which exhibit breakdown under the short current-limited voltage stress and by applying the specific relationship previously determined. The method enables the effective determination of the results of life tests normally applied at least to statistical samples of devices manufactured to be eliminated except for an initial sample at the beginning of a manufacturing cycle.

Inventors

  • 👤 David Charles Trindade

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 03:11
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/316; G01R31/26; G01R31/2644

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 294 words
The method for predicting the failure rate of metalinsulator-semiconductor devices caused by variations in manufacturing process parameters, comprising the steps of: A. applying for a relatively short period of time, a first current limited voltage across the insulator of a first portion of a group of substantially identical metal-insulatorsemiconductor devices, said voltage having a magnitude substantially equal to the saturation voltage of said semiconductor device; B. determining the average percentage of said first portion of said devices which exhibit metal-to-semiconductor voltage breakdown under said first voltage at the end of said short period of time; C. applying for an extended period of time a second voltage across the insulator of at least a second portion of said group of devices, said second voltage having a magnitude substantially lower than said first voltage; D. determining the average percentage of said second portion of said devices which exhibit metal-to-semiconductor voltage breakdown under said second voltage at the end of said extended period of time; E. correlating the percentage of devices exhibiting voltage breakdown in said short and extended periods of time to determine the specific relationship between said percentages; and F. predicting the average percentage of devices expected to exhibit voltage-to-semiconductor breakdown at said extended period of time for a different group of metal-insulatorsemiconductor devices manufactured under different manufacturing process parameters by determining tHe average percentage of at least a portion of said different group of devices exhibiting voltage breakdown after applying said first voltage for said relatively short period of time and determining the expected average percentage of devices to exhibit breakdown at said extended period of time by applying the specific relationship determined in step E to said average percentage of devices exhibiting voltage breakdown in said portion of said group of different devices.
Claim 2
Independent Claim 294 words
The method for predicting the failure rate of metalinsulator-semiconductor devices caused by variations in manufacturing process parameters, comprising the steps of: A. applying for a relatively short period of time, a first current limited voltage across the insulator of a first portion of a group of substantially identical metal-insulatorsemiconductor devices, said voltage having a magnitude substantially equal to the saturation voltage of said semiconductor device; B. determining the average percentage of said first portion of said devices which exhibit metal-to-semiconductor voltage breakdown under said first voltage at the end of said short period of time; C. applying for an extended period of time a second voltage across the insulator of at least a second portion of said group of devices, said second voltage having a magnitude substantially lower than said first voltage; D. determining the average percentage of said second portion of said devices which exhibit metal-to-semiconductor voltage breakdown under said second voltage at the end of said extended period of time; E. correlating the percentage of devices exhibiting voltage breakdown in said short and extended periods of time to determine the specific relationship between said percentages; and F. predicting the average percentage of devices expected to exhibit voltage-to-semiconductor breakdown at said extended period of time for a different group of metal-insulatorsemiconductor devices manufactured under different manufacturing process parameters by determining tHe average percentage of at least a portion of said different group of devices exhibiting voltage breakdown after applying said first voltage for said relatively short period of time and determining the expected average percentage of devices to exhibit breakdown at said extended period of time by applying the specific relationship determined in step E to said average percentage of devices exhibiting voltage breakdown in said portion of said group of different devices.
Claim 3
Dependent Claim 21 words
The method of claim 1 wherein said metal-insulator-semiconductor devices comprise test structures on semiconductor substrates containing field effect transistor integrated circuits.
Claim 4
Dependent Claim 18 words
The method of claim 2 wherein said test structures comprise a plurality of capacitors connected in electrical parallel.
Claim 5
Dependent Claim 18 words
The method of claim 1 wherein said extended period of time is in excess of one hundred hours.
Claim 6
Dependent Claim 22 words
The method of claim 1 wherein step C comprises field test of said second portion of said devices in an application environment.
Claim 7
Dependent Claim 19 words
The method of claim 1 wherein said short period of time is about two to ten seconds in duration.
Claim 8
Independent Claim 214 words
The method of determining at the time of manufacture the future expected percentage of gate dielectric failures of insulated gagte field effect devices of the same type as those having a known percentage of gate dielectric failures as determined from an extended constant stress test performed on previously manufactured devices, comprising the steps of: A. electrically stressing for a short period of time the gate dielectric of a plurality of recently manufactured devices with a current limited voltage having a magnitude substantially equal to the saturation voltage capable of being sustained by the gate dielectric of said devices; B. determining the average percentage of said recently manufactured devices exhibiting gate dielectric breakdown after said short period of time; C. correlating the average percentage of devices exhibiting breakdown with said known percentage of gate dielectric failures to determine the specific relationship between said percentages; D. manufacturing an additional plurality of devices of the same type as previously manufactured; E. determining the average percentage of gate dielectric breakdowns of at least a portion of said additional plurality of devices after the application of the conditions of step A; and F. determining the expected future percentage of gate dielectric failures by applying said specific relationship determined in step C to the average percentage determined in step E.
Claim 9
Independent Claim 214 words
The method of determining at the time of manufacture the future expected percentage of gate dielectric failures of insulated gagte field effect devices of the same type as those having a known percentage of gate dielectric failures as determined from an extended constant stress test performed on previously manufactured devices, comprising the steps of: A. electrically stressing for a short period of time the gate dielectric of a plurality of recently manufactured devices with a current limited voltage having a magnitude substantially equal to the saturation voltage capable of being sustained by the gate dielectric of said devices; B. determining the average percentage of said recently manufactured devices exhibiting gate dielectric breakdown after said short period of time; C. correlating the average percentage of devices exhibiting breakdown with said known percentage of gate dielectric failures to determine the specific relationship between said percentages; D. manufacturing an additional plurality of devices of the same type as previously manufactured; E. determining the average percentage of gate dielectric breakdowns of at least a portion of said additional plurality of devices after the application of the conditions of step A; and F. determining the expected future percentage of gate dielectric failures by applying said specific relationship determined in step C to the average percentage determined in step E.
Claim 10
Dependent Claim 19 words
The method of claim 7 wherein said short period of time is about two to ten seconds in duration.
Claim 11
Dependent Claim 27 words
The method of claim 7 wherein said known percentage of gate dielectric failures is determined by an accelerated test of duration in excess of one hundred hours.
Claim 12
Dependent Claim 12 words
The method of claim 9 wherein said accelerated test includes temperature stressing.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-06-09 1978-12-09 1979-06-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-06-09 1982-12-09 1983-06-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-06-09 1986-12-09 1987-06-10 $7700.00 Window Closed / Lapsed

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