← Back to Patent Explorer
US3888075A Expired / Lapsed US ⏱️ 0.0 years remaining

Electronic clock

Assignee: TOPP ELECTRONICS Inc
•
Filing: 1974-01-25
•
Granted: 1975-06-10
•
Expires: 1994-01-25
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract AC voltage input to a solid state, clock circuit having a 60 Hz sinusoidal waveform, is transmitted through field effect transistors to the light emitting diodes of a numeric display for time indicating purposes. The rectifying action of the light emitting diodes momentarily interrupts illumination in view of the AC drive, enabling use of high peak currents during short duty cycles.

Inventors

  • 👤 Leon S Wecker

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 22:14
CPC Classifications
G; G04; G04G; G04G9/00; G04G9/08; G04G9/10; G04C; G04C23/00; G04C23/02; G04C23/12; G04G19/00

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 78 words
In combination with a source of AC voltage and a DC powered clock device having a plurality of outputs, a light emitting display having low current rectifying devices connected to said outputs, voltage rectifying means connected to said source for supplying DC energizing voltage to said clock device, and means connected to said source for transmitting a continuous, polarity changing excitation voltage to the low current rectifying devices of the display through the outputs of the clock device.
Claim 2
Dependent Claim 78 words
In combination with a source of AC voltage and a DC powered clock device having a plurality of outputs, a light emitting display having low current rectifying devices connected to said outputs, voltage rectifying means connected to said source for supplying DC energizing voltage to said clock device, and means connected to said source for transmitting a continuous, polarity changing excitation voltage to the low current rectifying devices of the display through the outputs of the clock device.
Claim 3
Dependent Claim 101 words
In combination with a source of AC voltage and a DC powered clock device having a plurality of outputs connected to a numeric display device, voltage rectifying means connected to said source for supplying DC energizing voltage to said clock device, and means connected to said source for transmitting a continuous, polarity changing excitation voltage to the numeric display device through the outputs of the clock device, said numeric display device including a plurality of light emitting diodes respectively connected to the outputs of the clock device and means connected to said source for biasing all of the light emitting diodes.
Claim 4
Dependent Claim 101 words
In combination with a source of AC voltage and a DC powered clock device having a plurality of outputs connected to a numeric display device, voltage rectifying means connected to said source for supplying DC energizing voltage to said clock device, and means connected to said source for transmitting a continuous, polarity changing excitation voltage to the numeric display device through the outputs of the clock device, said numeric display device including a plurality of light emitting diodes respectively connected to the outputs of the clock device and means connected to said source for biasing all of the light emitting diodes.
Claim 5
Dependent Claim 34 words
The combination of claim 2 including a radio adapted to be energized by said source, and switch means responsive to an alarm signal from the clock device for connecting the radio in said source.
Claim 6
Dependent Claim 20 words
The combination of claim 3 including means connected to said source for exciting all of the low current rectifying devices.
Claim 7
Dependent Claim 16 words
The combination of claim 2 wherein said clock device is a large scale integrated clock circuit.
Claim 8
Dependent Claim 16 words
The combination of claim 4 wherein said outputs of the clock device are field effect transistors.
Claim 9
Dependent Claim 16 words
The combination of claim 6 wherein said clock device is a large scale integrated clock circuit.
Claim 10
Dependent Claim 16 words
The combination of claim 7 wherein said outputs of the clock device are field effect transistors.
Claim 11
Dependent Claim 16 words
The combination of claim 6 wherein said outputs of the clock device are field effect transistors.
Claim 12
Dependent Claim 40 words
The combination of claim 9 wherein said numeric display device includes a plurality of light emitting diodes respectively connected to the outputs of the clock device and means connected to said source for biasing all of the light emitting diodes.

References Cited (Backward Citations)

US3257618A Cited
US3794990A Cited
US3813533A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-06-09 1978-12-09 1979-06-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-06-09 1982-12-09 1983-06-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-06-09 1986-12-09 1987-06-10 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag