US3887793A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Interstitial contrasting coded mark label reading system
Assignee: Computer Identics Corp
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Filing: 1974-01-11
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Granted: 1975-06-03
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Expires: 1994-01-11
Abstract
Abstract In a label reading system having means for scanning a label and providing signals representative of information borne by the label, a system for decoding signals derived from the label having a first set of information bearing segments having a first characteristic and at least a second set of information bearing segments disposed interstitially of the first set of segments and having a second characteristic contrasting with the first characteristic, each of the segments in each of the sets representing one of a predetermined number of different states, the decoding system comprising: a first decoder channel responsive to a first set of segments and a second decoder channel responsive to a second set of segments, each of the channels including a load register for accumulating signals representative of a set of information bearing segments, a timing circuit for establishing a recognition period for each of the predetermined number of states and providing to the load register a data signal representative of that state during that period; and a steering circuit, responsive to the timing circuit, for providing a clock pulse to the load register to enter the data signal in response to a signal representative of a segment occurring during that period.
Inventors
- 👤 Frank Carl Goodfinger
- 👤 Richard H Tuhro
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 20:56
CPC Classifications
G; G06; G06K; G06K7/00; G06K7/10; G06K7/10544; G06K7/10821; G06K7/10861
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
203 words
In a label reading system having means for scanning a label and providing signals representative of information borne by the label, a system for decoding signals derived from a label having a first set of information bearing segments having a first characteristic and at least a second set of information bearing segments disposed interstitially of said first set of segments and having a second characteristic contrasting with said first characteristic, each of said segments in each of said sets representing one of a predetermined number of different states, said decoding system comprising: a first decoder channel responsive to a first set of segments and a second decoder channel responsive to a second set of segments, each of said channels including: a load register for accumulating signals representative of a set of information bearing signals; a timing circuit for establishing a recognition period for each of the predetermined number of different states and providing to said load register a data signal representative of that state during that period; and a steering circuit, responsive to said timing circuit, for enabling a clock pulse to said load register to enter said data signal in response to a signal representative of a segment occurring during that period.
Claim 2
Dependent Claim
203 words
In a label reading system having means for scanning a label and providing signals representative of information borne by the label, a system for decoding signals derived from a label having a first set of information bearing segments having a first characteristic and at least a second set of information bearing segments disposed interstitially of said first set of segments and having a second characteristic contrasting with said first characteristic, each of said segments in each of said sets representing one of a predetermined number of different states, said decoding system comprising: a first decoder channel responsive to a first set of segments and a second decoder channel responsive to a second set of segments, each of said channels including: a load register for accumulating signals representative of a set of information bearing signals; a timing circuit for establishing a recognition period for each of the predetermined number of different states and providing to said load register a data signal representative of that state during that period; and a steering circuit, responsive to said timing circuit, for enabling a clock pulse to said load register to enter said data signal in response to a signal representative of a segment occurring during that period.
Claim 3
Dependent Claim
203 words
In a label reading system having means for scanning a label and providing signals representative of information borne by the label, a system for decoding signals derived from a label having a first set of information bearing segments having a first characteristic and at least a second set of information bearing segments disposed interstitially of said first set of segments and having a second characteristic contrasting with said first characteristic, each of said segments in each of said sets representing one of a predetermined number of different states, said decoding system comprising: a first decoder channel responsive to a first set of segments and a second decoder channel responsive to a second set of segments, each of said channels including: a load register for accumulating signals representative of a set of information bearing signals; a timing circuit for establishing a recognition period for each of the predetermined number of different states and providing to said load register a data signal representative of that state during that period; and a steering circuit, responsive to said timing circuit, for enabling a clock pulse to said load register to enter said data signal in response to a signal representative of a segment occurring during that period.
Claim 4
Dependent Claim
203 words
In a label reading system having means for scanning a label and providing signals representative of information borne by the label, a system for decoding signals derived from a label having a first set of information bearing segments having a first characteristic and at least a second set of information bearing segments disposed interstitially of said first set of segments and having a second characteristic contrasting with said first characteristic, each of said segments in each of said sets representing one of a predetermined number of different states, said decoding system comprising: a first decoder channel responsive to a first set of segments and a second decoder channel responsive to a second set of segments, each of said channels including: a load register for accumulating signals representative of a set of information bearing signals; a timing circuit for establishing a recognition period for each of the predetermined number of different states and providing to said load register a data signal representative of that state during that period; and a steering circuit, responsive to said timing circuit, for enabling a clock pulse to said load register to enter said data signal in response to a signal representative of a segment occurring during that period.
Claim 5
Dependent Claim
57 words
The system of claim 1 in which said decoding system includes a reset gate for resetting each of said load registers and each steering circuit in each of said decoder channels produces a reset signal to said reset gate in response to a signal representative of a segment occurring at a time other than a said period.
Claim 6
Dependent Claim
54 words
The system of claim 1 in which said label includes at least one orientation segment and each said decoder channel includes a directional logic circuit for determining whether a label has been read in the forward or reverse direction and controlling the output circuitry when the label is read out of said load register.
Claim 7
Dependent Claim
46 words
The system of claim 1 in which said label includes a parity segment for at least one of said sets of segments and the respective decoder channel includes a parity circuit for determining whether parity has been met by the segment signals in the load register.
Claim 8
Dependent Claim
54 words
The system of claim 1 in which said predetermined number of states is two and said segments are designated wide and narrow and in each decoder channel said timing circuit includes a short timer for providing a recognition period for narrow segments and a long timer for providing a recognition period for wide segments.
Claim 9
Dependent Claim
51 words
The system of claim 5 in which said timing circuit further includes an initial timer prior to said short timer for eliminating signals which are too short and an intermediate timer between said short and long timers for eliminating signals which occur at the transition area between narrow and wide signals.
Claim 10
Dependent Claim
16 words
The system of claim 1 in which there are only two sets of information bearing segments.
Claim 11
Dependent Claim
14 words
The system of claim 1 in which said timing circuit generates said data signals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-06-02 | 1978-12-02 | 1979-06-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-06-02 | 1982-12-02 | 1983-06-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-06-02 | 1986-12-02 | 1987-06-03 | $7700.00 | Window Closed / Lapsed |