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US3885220A Expired / Lapsed US ⏱️ 0.0 years remaining

Buffered multiplexer with differential amplifier

Assignee: Applied Automation Inc
•
Filing: 1973-12-04
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Granted: 1975-05-20
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Expires: 1993-12-04
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Abstract

Abstract A multiplexer is disclosed which comprises a common output circuit having first and second buffer amplifiers and a differential amplifier connected to the outputs of the first and second buffer amplifiers. A plurality of input circuits are provided to receive individual signals. Each input circuit includes third and fourth buffered amplifiers which are connected to respective input terminals. The outputs of the third and fourth buffer amplifiers are connected selectively by switching means to the respective inputs of the first and second buffer amplifiers of the common output circuit.

Inventors

  • 👤 Dale A Fluegal

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-10 01:30
CPC Classifications
G; G08; G08C; G08C15/00; G08C15/06; G08C15/08

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 169 words
A multiplexer comprising: an output circuit comprising first and second buffer amplifiers, first and second output terminals, a differential amplifier having first and second inputs and an output, means connecting the output of said differential amplifier to said first output terminal, a first potentiometer connected between the output of said first amplifier and said first output terminal, a second potentiometer connected between the output of said second amplifier and said second output terminal, and means connecting the first and second inputs of said differential amplifier to the contactors of said first and second potentiometers, respectively; and a plurality of input circuits, each comprising first and second input terminals, third and fourth buffer amplifiers, means connecting said first input terminal to the input of said third amplifier and said second input terminal to the input of said fourth amplifier, and circuit means including switching means to connect the outputs of said third and fourth amplifiers selectively to the inputs of said first and second amplifiers, respectively, of said output circuit.
Claim 2
Dependent Claim 169 words
A multiplexer comprising: an output circuit comprising first and second buffer amplifiers, first and second output terminals, a differential amplifier having first and second inputs and an output, means connecting the output of said differential amplifier to said first output terminal, a first potentiometer connected between the output of said first amplifier and said first output terminal, a second potentiometer connected between the output of said second amplifier and said second output terminal, and means connecting the first and second inputs of said differential amplifier to the contactors of said first and second potentiometers, respectively; and a plurality of input circuits, each comprising first and second input terminals, third and fourth buffer amplifiers, means connecting said first input terminal to the input of said third amplifier and said second input terminal to the input of said fourth amplifier, and circuit means including switching means to connect the outputs of said third and fourth amplifiers selectively to the inputs of said first and second amplifiers, respectively, of said output circuit.
Claim 3
Dependent Claim 81 words
The multiplexer of claim 1 wherein each of said input circuits includes an AND circuit having first and second inputs and an output, and means connecting the output of said AND circuit to said switching means to close same in response to the AND circuit being actuated by signals being received at its first and second inputs; and further comprising means connecting the second inputs of the AND circuits of said plurality of input circuits together to receive a common signal.
Claim 4
Dependent Claim 19 words
The multiplexer of claim 1 wherein a low pass filter is connected in each of said input circuit means.
Claim 5
Dependent Claim 23 words
The multiplexer of claim 1 wherein a low pass filter is connected between said switching means and said first and second buffer amplifiers.
Claim 6
Dependent Claim 25 words
The multiplexer of claim 1, further comprising means to apply a bias potential of preselected magnitude to one of the inputs of said differential amplifier.

References Cited (Backward Citations)

US2556693A Cited
US3230397A Cited
US3387224A Cited
US3453554A Cited
US3539928A Cited
US3550016A Cited
US3621288A Cited
US3755750A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-05-19 1978-11-18 1979-05-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-05-19 1982-11-18 1983-05-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-05-19 1986-11-18 1987-05-20 $7700.00 Window Closed / Lapsed

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