Voice operated switch including apparatus for establishing a variable threshold noise level

Claim 2

Apparatus for establishing a variable threshold noise level, said apparatus comprising: first means for selecting the largest data word from a first predetermined number of sequentially received data words; second means connected to receive said largest data word and for accumulating a second predetermined number of said largest data words to form a summed data word; third means connected to receive said summed data word and for selecting the smallest of said summed data words detected during a first predetermined time period; and fourth means connected to receive and store said smallest of said summed data words for use as a threshold noise level.

Claim 3

The apparatus as defined in claim 1 and including fifth means for adding to said smallest summed data word a fixed digital word to establish a threshold noise level.

Claim 4

The apparatus as defined in claim 1 wherein said first means comprises: a comparator having a first and a second plurality of parallel input terminals and an output terminal, said comparator being connected to receive said data words on said first plurality of input terminals; a storage register having a plurality of parallel input terminals and a corresponding plurality of output terminals, said register being connected to receive said data words on said plurality of input terminals, said output terminals being connected to corresponding ones of said second plurality of input terminals of said comparator for communicating data words from said storage register to said comparator; and wherein said comparator is effective to compare said data words on said first and second plurality of input terminals of said comparator and to produce an output signal when said data word on said first plurality of input terminals is lArger than said data word on said second plurality of input terminals, said output signal causing said data word on said first plurality of input terminals to be loaded into said storage register.

Claim 5

The apparatus as defined in claim 1 wherein said second means comprises: a down counter having a plurality of input terminals and a corresponding plurality of output terminals, said counter being connected to receive said largest data word on said plurality of input terminals and to supply said largest data word to said plurality of output terminals; logic circuitry connected to receive said largest data word from said plurality of output terminals of said counter, said logic circuitry being effective to convert said largest data word to a serial data stream; and an integrating counter having an input terminal and a plurality of output terminals, said integrating counter being connected to receive said serial data stream on said input terminal and being effective to sum a plurality of said largest data words to form said summed data word.

Claim 6

The apparatus as defined in claim 1 wherein said third means comprises: a first recirculating shift register having a plurality of input terminals for receiving said summed data word, said first register having an output terminal and serially providing said summed data word to said output terminal, said register having a further input terminal connected to said output terminal for recirculating said summed data word, a steering logic circuit having first, second and third input terminals and an output terminal, said first input terminal of said logic circuit being connected to said output terminal of said first register; a second recirculating shift register having an input terminal and an output terminal, said output terminal of said second register being connected to said second input terminal of said logic circuit, said output terminal of said logic circuit being connected to said input terminal of said second register; a comparator having first and second input terminals and an output terminal, said first input terminal of said comparator being connected to said output terminal of said first register and said second input terminal of said comparator being connected to said output terminal of said second register, said output terminal of said comparator being connected to said third input terminal of said logic circuit, said comparator producing an output signal of first logical significance when said summed data word in said first register is smaller and said summed data word in said second register and producing an output signal of second logical significance when said summed data word in said first register is larger than said summed data word in said second register; and wherein said logic circuit is responsive to said signal of first logical significance to transfer said summed data word from said first register into said second register and is responsive to said signal of second logical significance to cause said summed data word in said second register to be recirculated.

Claim 7

The apparatus as defined claim 1 wherein said fourth means comprises: a shift register having an input terminal and an output terminal; a steering logic circuit having an output terminal and first, second and third input terminals, said output terminal of said logic circuit being connected to said input terminal of said register, said first input terminal of said logic circuit being connected to said output terminal of said register and said second input terminal being connected to said third means to receive said summed data word from said third means; and means for supplying a periodic update signal to said third input terminal of said logic circuit to cause said summed data word to be transferred from said third means into said shift register.

Claim 8

The apparatus as defined in claim 2 wherein said fifth means comprises: a storage register for storing a fixed data word; an adder including a First input terminal connected to receive said smallest summed data word and a second input terminal connected to receive said fixed data word from said storage register, said adder being effective to add said smallest summed data word and said fixed data word to produce a data word representative of threshold noise level.

Claim 9

The apparatus as defined in claim 6 wherein said smallest summed data word placed in said second register during a second predetermined time period is automatically transferred into said shift register while said summed data word in said first register is simultaneously transferred into said second register to thereby effect an update of said apparatus.

Claim 12

The method as defined in claim 9 and including the step of: adding to said smallest of said summed data words a fixed data word to produce a new word representative of threshold noise level.

Claim 13

The method as defined in claim 9 wherein said smallest of said summed data words is automatically transferred for storing and use as a threshold noise level at periodic second predetermined time periods.

Claim 14

Apparatus for detecting speech signals in the presence of noise comprising: first means for selecting the largest data word from a first predetermined number of sequentially received data words; second means connected to receive said largest data word and for accumulating a second predetermined number of said largest data words to form a summed data word; and third means for receiving said summed data word and for comparing said summed data word to a noise threshold level, said third means providing an output signal when said summed data word exceeds said threshold noise level.

Claim 15

Apparatus for detecting speech signals in the presence of noise comprising: first means for selecting the largest data word from a first predetermined number of sequentially received data words; second means connected to receive said largest data word and for accumulating a second predetermined number of said largest data words to form a summed data word; and third means for receiving said summed data word and for comparing said summed data word to a noise threshold level, said third means providing an output signal when said summed data word exceeds said threshold noise level.

Claim 16

The apparatus as defined in claim 12 wherein said first means comprises: a digital comparator having a first and a second plurality of parallel input terminals and an output terminal, said comparator being connected to receive said data words on said first plurality of input terminals; a storage register having a plurality of parallel input terminals and a corresponding plurality of output terminals said register being connected to receive said data words on said plurality of input terminals, said output terminals being connected to corresponding ones of said second plurality of input terminals of said comparator for communicating data words from said storage register to said comparator; and wherein said comparator is effective to compare said data words on said first and second plurality of input terminals of said comparator and to produce an output signal when said data word from said first plurality of input terminals is larger than said data word on said second plurality of input terminals, said output signal causing said data word on said first plurality of input terminals to be loaded into said storage register.

Claim 17

The apparatus as defined in claim 12 wherein said second means comprises: a down counter having a plurality of input terminals and a corresponding plurality of output terminals, said counter being connected to receive said largest data word on said plurality of input terminals, and to supply said largest data word to said plurality of output terminals; logic circuitry connected to receive said largest data word from said plurality of output terminals of said counter, said logic circuitry being effective to convert the largest data word to a Serial data stream; and an integrating counter having an input terminal and a plurality of output terminals, said integrating counter being connected to receive said serial data stream on said input terminal and being effective to sum a plurality of said largest data words to form said summed data word.

Claim 18

The apparatus as defined in claim 12 wherein said third means comprises: a first recirculating shift register having an output terminal and an input terminal connected to recirculate data and further including a plurality of input terminals connected to receive said summed data word; said register being responsive to a first signal to transfer said summed data word into said register, and being responsive to a second plurality of clock signals to serially clock said summed data word to said output terminal while recirculating said summed data word to said input terminal; a comparator having a first input terminal connected to said output terminal of said register and a second input terminal connected to receive a digital word representative of a threshold noise level, said comparator being effective to compare said summed data word to said threshold noise level on a bit-by-bit basis and produce an output signal when said summed data word is larger than said threshold noise level.

Claim 19

A digital voice-operated switch for use in a delta modulation transmission system including an encoder providing a digital data stream and wherein said encoder further provides a digital word representative of encoder activity, said voice-operated switch comprising: first means for selecting the largest data word from a first predetermined number of sequentially received data words; second means connected to receive said largest data word and for accumulating a second predetermined number of said largest data words to form a summed data word; third means for receiving said summed data word and for comparing said summed data word to a threshold noise level, said third means providing a first signal when said summed data word exceeds said threshold noise level; and fourth means responsive to said first signal to provide a transmit signal.

Claim 20

A digital voice-operated switch for use in a delta modulation transmission system including an encoder providing a digital data stream and wherein said encoder further provides a digital word representative of encoder activity, said voice-operated switch comprising: first means for selecting the largest data word from a first predetermined number of sequentially received data words; second means connected to receive said largest data word and for accumulating a second predetermined number of said largest data words to form a summed data word; third means for receiving said summed data word and for comparing said summed data word to a threshold noise level, said third means providing a first signal when said summed data word exceeds said threshold noise level; and fourth means responsive to said first signal to provide a transmit signal.

Claim 21

The digital voice-operated switch as defined in claim 16 and including: fifth means responsive to said first signal to provide a second signal after a first predetermined time period and to maintain said second signal a second predetermined time period after removal of said first signal; sixth means responsive to said first signal to provide a predetermined pattern data signals; seventh means for delaying data from said encoder for a time period equal to said second predetermined time period; eighth means having a first, a second, and third input terminal and an output terminal, said first input terminal being connected to receive said predetermined pattern of data signals, said second input terminal being connected to receive said delayed data, and said third input terminal being connected to receive said second signal, and wherein said eighth means is responsive to said second signal being of first logical significance to pass said predetermined pattern of data signals to said output terminal and being responsive to said second signal of second logical significance to block said predetermined pattern of data signals and to pass delayed data from said seventh means to said output terminal.

Claim 22

The digital voice-operated switch as defined in claim 16 wherein said first means comprises: a digital comparator having a first and a second plurality of parallel input terminals and an output terminal, said comparator being connected to receive said data words on said first plurality of input terminals; a storage register having a plurality of parallel input terminals and a corresponding plurality of output terminals, said register being connected to receive said data words on said plurality of input terminals, said output terminals being connected to corresponding ones of said second pluRality of input terminals of said comparator for communicating data words from said storage register to said comparator; and wherein said comparator is effective to compare said data words on said first and second plurality of input terminals of said comparator and to produce an output signal when said data word from said first plurality of input terminals is larger than said data word on said second plurality of input terminals, said output signal causing said data word on said first plurality of input terminals to be loaded into said storage register.

Claim 23

The digital voice-operated switch as defined in claim 16 wherein said second means comprises: a down counter having a plurality of input terminals and a corresponding plurality of output terminals, said counter being connected to receive said largest data word on said plurality of input terminals, and to supply said largest data word to said plurality of output terminals; logic circuitry connected to receive said largest data word from said plurality of output terminals of said counter, said logic circuitry being effective to convert the largest data word to its serial data stream; and an integrating counter having an input terminal and a plurality of output terminals, said integrating counter being connected to receive said serial data stream on said input terminal and being effective to sum a plurality of said largest data words to form said summed data word.

Claim 24

The digital voice-operated switch as defined in claim 16 wherein said third means comprises: a first recirculating shift register having an output terminal and an input terminal connected to recirculate data and further including a plurality of input terminals connected to receive said summed data word, said register being responsive to a first signal to transfer said summed data word into said register, and being responsive to the second plurality of clock signals to serially clock said summed data word to said output terminal while recirculating said summed data word to said input terminal; and a comparator having a first input terminal connected to said output terminal of said register and a second input terminal connected to receive a digital word representative of a noise threshold level, said comparator being effective to compare said summed data word to said threshold noise level on a bit-by-bit basis and produce an output signal when said summed data word is larger than said threshold noise level.

Claim 25

The digital voice-operated switch as defined in claim 16 wherein said fourth means comprises an OR gate having first and second input terminals and an output terminal, said first input terminal being connected to receive said first signal and said second input terminal being connected to receive said second signal and wherein said transmit signal is provided at said output terminal.

Claim 26

The digital voice-operated switch as defined in claim 17 wherein said fifth means comprises a digital counter.

Claim 27

The digital voice-operated switch as defined in claim 17 wherein said sixth means comprises a digital counter and a logic circuit connected to receive count pulses from said counter and responsive thereto to provide a predetermined pattern of data bits.

Claim 28

The digital voice-operated switch as defined in claim 17 wherein said seventh means comprises a digital shift register.

Claim 29

A digital voice-operated switch for use in a receive channel of a digital communication system of a type including a digital to analog decoder in said receive channel, said switch comprising: first means connected to receive data signals and responsive to a first predetermined pattern thereof for enabling said receive channel to pass said data signals to said decoder; and second means for supplying a second predetermined pattern of digital signals to said decoder in the absence of said data signals.

Claim 30

A digital voice-operated switch for use in a receive channel of a digital communication system of a type including a digital to analog decoder in said receive channel, said switch comprising: first means connected to receive data signals and responsive to a first predetermined pattern thereof for enabling said receive channel to pass said data signals to said decoder; and second means for supplying a second predetermined pattern of digital signals to said decoder in the absence of said data signals.

Claim 31

In a delta modulation communication system including an encoder in a transmit channel for converting an analog signal to a digital data stream and a decoder in a receive channel for converting said digital data stream to an analog signal, the improvement comprising: a digital voice-operated switch having a first section in said transmit channel and a second section is said receive channel, said first section being responsive to said digital data stream from said encoder to enable said transmit channel and to transmit a predetermined pattern of logic signals, said first section including means for delaying said digital data stream while transmitting said logic signals, and said second section being responsive to said logic signals to enable said receive channel.

Claim 32

In a delta modulation communication system including an encoder in a transmit channel for converting an analog signal to a digital data stream and a decoder in a receive channel for converting said digital data stream to an analog signal, the improvement comprising: a digital voice-operated switch having a first section in said transmit channel and a second section is said receive channel, said first section being responsive to said digital data stream from said encoder to enable said transmit channel and to transmit a predetermined pattern of logic signals, said first section including means for delaying said digital data stream while transmitting said logic signals, and said second section being responsive to said logic signals to enable said receive channel.

Claim 33

The improvement as defined in claim 26 wherein said first section of said voice-operated switch comprises: first means for selecting the largest data word from a first predetermined number of sequentially received data words; second means connected to receive said largest data word and for accumulating a second predetermined number of said largest data words to form a summed data word; third means for receiving said summed data word and for comparing said summed data word to a threshold noise level, said third means providing a first signal when said summed data word exceeds said threshold noise level; and fourth means responsive to said first signal to provide a transmit signal; fifth means responsive to said first signal to provide a second signal after a first predetermined time period and to maintain said second signal a second predetermined time period after removal of said first signal; sixth means responsive to said first signal to provide a predetermined pattern of data signals; seventh means for delaying data from said encoder for a time period equal to said second predetermined time period; eighth means having a first, a second, and a third input terminal and an output terminal, said first input terminal being connected to receive said predetermined pattern of data signals, said second input terminal being connected to receive said delayed data, and said third input terminal being connected to receive said second signal, and wherein said eighth means is responsive to said second signal being of first logical significance to pass said predetermined pattern of data signals to said output terminal and being responsive to said second signal of second logical significance to block said predetermined pattern of data signals and to pass delayed data from said seventh means to said output terminal.

Claim 34

The improvement as defined in claim 26 wherein said second section of said voice-operated switch comprises: ninth means connected to receive said digital data stream and said logic signals, said ninth means being responsive to said logic signals to enable said receive channel to pass said digital data stream to said decoder; and tenth means for supplying a second predetermined pattern of logic signals to said decoder in the absence of said digital data stream.