US3882355A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Flat screen display device using controlled cold cathodes
Assignee: International Business Machines Corp
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Filing: 1972-12-29
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Granted: 1975-05-06
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Expires: 1992-12-29
Abstract
Abstract The display device has an electrically conductive phosphorcoated transparent screen, a panel element disposed in close parallel relation to the screen with the panel having an array of electron emitting regions on a semiconductor plate, each controlled by an adjacent memory cell in the plate. An enclosure which includes the screen surrounds the panel. An electric potential is established between the screen and the panel, and a vacuum produced in the enclosure. Preferably, the memory cells associated with the electron emitting regions are storage elements of a shift register which extend throughout the entire array of electron emitters. A binary signal is introduced into the shift register which is used to establish a predetermined pattern of electron emitting regions on the semiconductor panel. This produces a display on the spaced transparent screen when the emitted electrons strike the phosphor on the screen.
Inventors
- 👤 Witt David De
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 05:49
CPC Classifications
H; H01; H01J; H01J29/00; H01J29/02; H01J29/04; H01J31/00; H01J31/08; H01J31/10; H01J31/12; H01J31/123; H01J31/125; H01J31/127; H01J2201/00; H01J2201/30; H01J2201/308; H01J2201/319
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
158 words
A display device comprising: an electcrically conductive phosphor coating on a transparent screen, a semiconductor integrated circuit panel element in close parallel relation to said screen having embodied 1. a matrix array of surface regions facing said phosphor coating, each of said surface regions being one electrode of a diode capable of cold emission of electrons into a vacuum when electrically biased. 2. a plurality of control devices, each of which is connected to control the electrical bias of an associated surface region of said matrix, 3. storage circuitry having a plurality of storage elements, each storage element being arranged to be capable of continuously activating as associated control device, means for translating externally applied digital signals to establish the desired state of each of said storage elements, means to maintain an electric potential between said screen and said panel element, and means for maintaining a vacuum at least in the space between said screen and said panel.
Claim 2
Dependent Claim
158 words
A display device comprising: an electcrically conductive phosphor coating on a transparent screen, a semiconductor integrated circuit panel element in close parallel relation to said screen having embodied 1. a matrix array of surface regions facing said phosphor coating, each of said surface regions being one electrode of a diode capable of cold emission of electrons into a vacuum when electrically biased. 2. a plurality of control devices, each of which is connected to control the electrical bias of an associated surface region of said matrix, 3. storage circuitry having a plurality of storage elements, each storage element being arranged to be capable of continuously activating as associated control device, means for translating externally applied digital signals to establish the desired state of each of said storage elements, means to maintain an electric potential between said screen and said panel element, and means for maintaining a vacuum at least in the space between said screen and said panel.
Claim 3
Dependent Claim
23 words
a plurality of control devices, each of which is connected to control the electrical bias of an associated surface region of said matrix,
Claim 4
Dependent Claim
23 words
a plurality of control devices, each of which is connected to control the electrical bias of an associated surface region of said matrix,
Claim 5
Dependent Claim
51 words
The display device of claim 1 wherein each of said surface regions in said matrix on said semiconductor panel element is an exposed region of silicon disposed over a P-type region in an N-type silicon substrate, said surface regions having means to provide an electron affinity lower than that of vacuum.
Claim 6
Dependent Claim
71 words
storage circuitry having a plurality of storage elements, each storage element being arranged to be capable of continuously activating as associated control device, means for translating externally applied digital signals to establish the desired state of each of said storage elements, means to maintain an electric potential between said screen and said panel element, and means for maintaining a vacuum at least in the space between said screen and said panel.
Claim 7
Dependent Claim
71 words
storage circuitry having a plurality of storage elements, each storage element being arranged to be capable of continuously activating as associated control device, means for translating externally applied digital signals to establish the desired state of each of said storage elements, means to maintain an electric potential between said screen and said panel element, and means for maintaining a vacuum at least in the space between said screen and said panel.
Claim 8
Dependent Claim
32 words
The display device of claim 2 wherein said exposed region has a thin overlying layer of cesium adapted to provide the silicon surface with an electron affinity lower than that of vacuum.
Claim 9
Dependent Claim
33 words
The display device as claim 2 wherein said plurality of control devices is a plurality of switch means adapted to bias said P-type regions underlying said surface regions relative to said N substrate.
Claim 10
Dependent Claim
25 words
The display device of claim 4 wherein said switch means is an NPN transistor having the collector connected to said P-region underlying said surface region.
Claim 11
Dependent Claim
44 words
The displaly device of claim 5 wherein said storage circuitry is a shift register having serially connected cells associated with each of said surface regions, and means responsive to the condition of each cell of said register to control said plurality of control devices.
Claim 12
Dependent Claim
20 words
The display device of claim 6 wherein the shift register of said semiconductor panel includes a flip flop memory circuit.
Claim 13
Dependent Claim
20 words
The display device of claim 6 wherein said shift register circuitry is in the form of merged transistor logic structure.
Claim 14
Dependent Claim
48 words
The display device of claim 8 wherein said shift register circuitry includes elongated parallel P-type surface diffusions in an N-type substrate, parallel metallurgy lines extending transverse to said surface diffusions, individual N-type diffused regions within said elongated surface diffusions, said metallurgy lines in ohmic contact with said regions.
Claim 15
Dependent Claim
38 words
The display device of claim 1 wherein there is means includes to provide a light intensity variation including means separating each of said surface regions into individual areas, means for controlling electron emission from each of said areas.
Claim 16
Dependent Claim
19 words
The display device of claim 10 wherein the ratios of areas of said surface regions are a geometric progression.
Claim 17
Dependent Claim
51 words
The display device of claim 1 wherein said matrix of surface regions on said panel is arranged in a plurality of blocks, said plurality of control devices includes a means to randomly address each of said blocks, and a shift register serially associated with the surface region of each individual block.
Claim 18
Dependent Claim
41 words
The display device of claim 12 wherein said plurality of control devices further includes row and column lines for randomly addressing said blocks of surface regions, and means to load a binary word into the shift register of a selected block.
Claim 19
Dependent Claim
62 words
The display device of claim 13 wherein said plurality of control devices includeS a latch circuit associated with said means to load, means to connect said row and column lines to the selected shift register of a block, means to impart a binary signal and clock pulse to said column and row lines to thereby form a display on the selected block.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-05-05 | 1978-11-04 | 1979-05-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-05-05 | 1982-11-04 | 1983-05-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-05-05 | 1986-11-04 | 1987-05-06 | $7700.00 | Window Closed / Lapsed |