Cross over detector and rectifier

Claim 2

In combination, a pair of transistors each having emitter, base and collector electrodes; means for connecting the base-to-emitter paths of said transistor pair in series circuit with each other, the base-emitter junctions of said paths being oppositely poled with respect to each other; a third transistor having emitter, base and collector electrodes; means for coupling the emitter-to-collector path of said third transistor in shunting circuit with said series circuit; means for applying a periodically varying potential across said series circuit to alternately forward bias the base-emitter junction of one of said transistors through the reverse breakdown voltage of the base-emitter junction of the other of said transistors when the potential across said series circuit exceeds a predetermined magnitude, whereby said one transistor is rendered conductive and said other transistor is rendered nonconductive between the emitter and collector electrodes thereof respectively; means for applying a biasing signal derived from the collector electrode of said one transistor to the base electrode of said third transistor only when said predetermined magnitude is exceeded; output means responsive to the conduction state of said third transistor.

Claim 3

The invention as defined in claim 1 further comprising: energy storing means connected in circuit with said third transistor; means for charging said energy storing means when said potential is of a given polarity; means for discharging said energy storing means through said third transistor when said potential is of a polarity opposite to said given polarity and when said predetermined magnitude is exceeded.

Claim 4

A clamping and zero crossing detection circuit adapted for use in integrated form comprising a pair of transistors of like conductivity type each having emitter, base and collector electrodes; a pair of input terminals adapted for connection to a periodically varying source of potential, each of said terminals connected to a respective one of said emitter electrodes; means for connecting Said base electrodes in common circuit; means for connecting said collector electrodes in common circuit; a further transistor having an emitter, a base, and a collector electrode; output means connected in series circuit with the emitter-tocollector path of said further transistor; means for connecting said series circuit in circuit with said input terminals; means for connecting said commonly coupled collector electrodes to the base electrode of said further transistor, whereby the base-emitter junction of one of said transistor pair is forward biased through the reverse breakdown voltage of the base-emitter junction of the other transistor of said pair to render said one transistor conductive and said other transistor nonconductive between the emitter and collector electrodes thereof when the potential applied to said input terminals is of a given polarity and exceeds a predetermined magnitude to provide an indication of the zero crossing point of said periodically varying source at said output means.

Claim 5

A clamping and zero crossing detection circuit adapted for use in integrated form comprising a pair of transistors of like conductivity type each having emitter, base and collector electrodes; a pair of input terminals adapted for connection to a periodically varying source of potential, each of said terminals connected to a respective one of said emitter electrodes; means for connecting Said base electrodes in common circuit; means for connecting said collector electrodes in common circuit; a further transistor having an emitter, a base, and a collector electrode; output means connected in series circuit with the emitter-tocollector path of said further transistor; means for connecting said series circuit in circuit with said input terminals; means for connecting said commonly coupled collector electrodes to the base electrode of said further transistor, whereby the base-emitter junction of one of said transistor pair is forward biased through the reverse breakdown voltage of the base-emitter junction of the other transistor of said pair to render said one transistor conductive and said other transistor nonconductive between the emitter and collector electrodes thereof when the potential applied to said input terminals is of a given polarity and exceeds a predetermined magnitude to provide an indication of the zero crossing point of said periodically varying source at said output means.

Claim 6

A clamping and detection circuit as defined in claim 3 further comprising energy storing means connected in circuit with said further transistor; means for charging said energy storing means only when said applied potential is of said given polarity; means for discharging said energy storing means through said series circuit when said applied potential is of opposite polarity to said given polarity and exceeds said predetermined magnitude.

Claim 7

A clamping and detection circuit as defined in claim 4 wherein said charging means comprises a diode-connected PNP lateral device.

Claim 8

A zero-voltage detection circuit for an integrated-circuit device comprising: a pair of NPN transistors having emitter, base and collector electrodes, the base electrodes of said transistor pair being connected in common; a pair of input terminals adapted for connection to a periodically varying source of potential, each of said terminals connected to a respective one of said emitter electrodes; A PNP lateral transistor having an emitter, a base, and a collector electrode; first and second resistance means connecting the respective collector electrodes of said transistor pair to the base electrode of said lateral transistor; a diode-connected PNP lateral device connected between the emitter electrode of a given one transistor of said transistor pair and the emitter electrode of said PNP lateral transistor; output means connected between the emitter electrode of the other transistor of said transistor pair and the collector electrode of said PNP lateral transistor; means for connecting a source of load current for said lateral transistor when said diode-connected device is reverse biased.

Claim 9

A zero-voltage detection circuit for an integrated-circuit device comprising: a pair of NPN transistors having emitter, base and collector electrodes, the base electrodes of said transistor pair being connected in common; a pair of input terminals adapted for connection to a periodically varying source of potential, each of said terminals connected to a respective one of said emitter electrodes; A PNP lateral transistor having an emitter, a base, and a collector electrode; first and second resistance means connecting the respective collector electrodes of said transistor pair to the base electrode of said lateral transistor; a diode-connected PNP lateral device connected between the emitter electrode of a given one transistor of said transistor pair and the emitter electrode of said PNP lateral transistor; output means connected between the emitter electrode of the other transistor of said transistor pair and the collector electrode of said PNP lateral transistor; means for connecting a source of load current for said lateral transistor when said diode-connected device is reverse biased.

Claim 10

A zero-voltage detection circuit for an integrated circuit as defined in claim 6 comprising a further resistance connected between the base and emitter electrodes of said PNP lateral transistor.

Claim 11

A circuit for passing current through a load when an input of an alternating voltage is greater than a given value in either polarity comprising, in combination: a closed loop which includes, in series, a charge storage means the load, and a swtich; two transistors of the same conductivity type, each having a base, a collector and an emitter electrode, connected base electrode to base electrode and collector electrode to collector electrode; means for applying said alternating voltage between the emitter electrodes of said two transistors at a level such that when said voltage exceeds said value in one polarity, one transistor conducts in the forward direction and the other in reverse breakdown mode and when said voltage exceeds said value in the other polarity, said one transistor conducts in the reverse breakdown mode and said other in the forward direction; means responsive to the conducting condition of the two transistors for closing said switch; and means responsive to Said voltage only when it is of one polarity for charging the charge storage means.

Claim 12

A circuit for passing current through a load when an input of an alternating voltage is greater than a given value in either polarity comprising, in combination: a closed loop which includes, in series, a charge storage means the load, and a swtich; two transistors of the same conductivity type, each having a base, a collector and an emitter electrode, connected base electrode to base electrode and collector electrode to collector electrode; means for applying said alternating voltage between the emitter electrodes of said two transistors at a level such that when said voltage exceeds said value in one polarity, one transistor conducts in the forward direction and the other in reverse breakdown mode and when said voltage exceeds said value in the other polarity, said one transistor conducts in the reverse breakdown mode and said other in the forward direction; means responsive to the conducting condition of the two transistors for closing said switch; and means responsive to Said voltage only when it is of one polarity for charging the charge storage means.

Claim 13

A circuit as set forth in claim 8 wherein said switch comprises means having current limiting properties.

Claim 14

A circuit as set forth in claim 8 wherein said switch comprises a third transistor having a base, a collector and an emitter electrode, whose emitter electrode-to-collector electrode path is in the loop.

Claim 15

A circuit as set forth in claim 10 wherein said means for closing said switch comprises a connection from the collector electrodes of said two transistors to the base electrode of said third transistor.

Claim 16

A circuit as set forth in claim 8 wherein said means responsive to said voltage only when it is of one polarity comprises an asymmetrically conducting device.

Claim 17

A circuit for passing current through a load when an input voltage of either polarity, applied across a pair of input terminals, exceeds a given magnitude, comprising: a charge storage means and a switch connected in series with said load in a closed loop, said switch having a control terminal; a unidirectionally conducting device connecting said charge storage means in a charge path across said pair of input terminals; and control means connected across said pair of input terminals for rendering said switch conductive when the input voltage exceeds said given magnitude in either polarity direction, said control means including two transistors of the same conductivity type, each having a base, a collector and an emitter electrode, said transistors direct current connected base electrode-to-base-electrode and collector-electrode-to-collector-electrode, with their collector-electrode-to-emitter-electrode paths connected in a series path across said pair of input terminals, and a connection from a point on said series path to said control terminal of said switch.

Claim 18

A circuit for passing current through a load when an input voltage of either polarity, applied across a pair of input terminals, exceeds a given magnitude, comprising: a charge storage means and a switch connected in series with said load in a closed loop, said switch having a control terminal; a unidirectionally conducting device connecting said charge storage means in a charge path across said pair of input terminals; and control means connected across said pair of input terminals for rendering said switch conductive when the input voltage exceeds said given magnitude in either polarity direction, said control means including two transistors of the same conductivity type, each having a base, a collector and an emitter electrode, said transistors direct current connected base electrode-to-base-electrode and collector-electrode-to-collector-electrode, with their collector-electrode-to-emitter-electrode paths connected in a series path across said pair of input terminals, and a connection from a point on said series path to said control terminal of said switch.

Claim 19

A circuit as set forth in claim 13 wherein said switch comprises a third transistor having a base, a collector and an emitter electrode, whose emitter electrode-to-collector electrode path in connected in said loop.

Claim 20

A circuit as set forth in claim 14 wherein said connection from a point on said series path to said control terminal of said switch comprises a connection from between the collector electrodes of said two transistors to the base electrode of said third transistor.

Claim 21

A circuit as set forth in claim 13 wherein said direct current connection of collector electrodes comprises resistor means connecting one collector electrode to a circuit point and second resistor means connecting the other collector electrode to said circuit point.

Claim 22

A circuit as set forth in claim 16, wherein the connection from a point on said series path comprises a connection from said circuit point to said control terminal.

Claim 23

In combination: two terminals across which an alternating voltage may be applied; two transistors of the same conductivity type, each having a base, a collector and an emitter electrode, direct current connected base electrode-to-base electrode and collector-electrode-to-collector electrode, one transistor connected at its emitter electrode to one of said terminals and the other connected at its emitter electrode to the other of said terminals; an output terminal at the direct current connection of said collector electrodes; and output circuit means coupled to said output terminal.

Claim 24

In combination: two terminals across which an alternating voltage may be applied; two transistors of the same conductivity type, each having a base, a collector and an emitter electrode, direct current connected base electrode-to-base electrode and collector-electrode-to-collector electrode, one transistor connected at its emitter electrode to one of said terminals and the other connected at its emitter electrode to the other of said terminals; an output terminal at the direct current connection of said collector electrodes; and output circuit means coupled to said output terminal.