Patent EP0486294A2 successfully refreshed from Google Patents.
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US3882284A
Expired / Lapsed
US
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Dial signal storage and transmission arrangement using dual recirculating registers and having repeat capability
Assignee: Arris Technology Inc
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Filing: 1974-03-20
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Granted: 1975-05-06
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Expires: 1994-03-20
Abstract
Abstract A storage arrangement, for storing sequences of digits required for telephone dialling and re-dialling, comprises a first recirculating register for the digits, a second recirculating register for a marker to mark the digit next to be read out, an excess bit position for the second register, gating means for gating the excess bit position and control means for controlling the gating means in dependence upon marker position and digit positions to enable the marker to move rearwardly relative to the sequence.
Inventors
- 👤 John Charles Munday
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 03:49
CPC Classifications
H; H04; H04M; H04M1/00; H04M1/26; H04M1/27; H04M1/272; H04M1/2725
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
86 words
A storage arrangement according to claim 1, wherein the second register means has two recirculation paths, one for recirculating the marker bit through the second register means, including the excess bit position, and the second for recirculating the marker bit through the second register means but excluding the excess bit position, the paths containing gates connected to be controlled by the control means in the form of logic circuitry operable in response to the marker position and the position of data in the first register means.
Claim 2
Dependent Claim
33 words
A storage arrangement according to claim 1, wherein the first register means is connected to feed a dialling device for producing dialling signals corresponding to the digits supplied by the first register means.
Claim 3
Dependent Claim
32 words
A storage arrangement according to claim 3, and comprising a pause defining arrangement connected by logic gates to the dialling device for inserting data defining an interdigital pause into the dialling device.
Claim 4
Dependent Claim
62 words
A storage arrangement according to claim 4, and comprising a bistable device connected to control the logic gates to alternately connect the first register means and the pause defining arrangement to the dialling device, and the control means being coupled to the bistable device to control the gating of the excess bit position in dependence upon the state of the bistable device.
Claim 5
Dependent Claim
42 words
A storage arrangement according to claim 3, wherein the dialling device comprises a counter connected to a clock so as to be counted from its stored value to a predetermined value to provide dialling pulses corresponding in number to the stored value.
Claim 6
Dependent Claim
41 words
A storage arrangement acording to claim 1, and comprising a data verifier to which the control means is connected to control the supply of digits to the first register means in dependence upon the validity of data determined by the verifier.
Claim 7
Dependent Claim
75 words
A storage arrangement according to claim 1, wherein the control means is operable in response to all the digits of a sequence being read-out to set the gate means to its first mode to cause the marker bit to circulate in a condition marking an empty position of the first register means and is subsequently effective to respond to a signal calling for preparation for redialling to set the gate means to its second mode.
Claim 8
Dependent Claim
42 words
A storage arrangement according to claim 1, and comprising a gating arrangement for gating digits into the first register means, the gating arrangement being coupled to be controlled by the control means in dependence upon digit positions in the first register means.
Claim 9
Dependent Claim
71 words
A storage arrangement according to claim 9, wherein the control means is operable to produce a gating signal for the gating arrangement in dependence upon marker bit position to cause a digit to be entered into the position of the first register means which is marked by the marker bit of that position is empty and into the nearest empty position rearward of that position when that position contains a digit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-05-05 | 1978-11-04 | 1979-05-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-05-05 | 1982-11-04 | 1983-05-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-05-05 | 1986-11-04 | 1987-05-06 | $7700.00 | Window Closed / Lapsed |