US3879671A
Expired / Lapsed
US
⏱️ 0.0 years remaining
System for detecting a digital phase-modulated wave
Assignee: KDDI Corp
•
Filing: 1973-10-26
•
Granted: 1975-04-22
•
Expires: 1993-10-26
Abstract
Abstract A system for detecting the phase position of each signal element of a phase-modulated wave digitally phase-modulated in synchronism with a predetermined modulation timing, in which a time interval between one of the zero crossing points of the phase-modulated wave and one of the zero crossing points of a reference carrier immediately succeeding to the former zero crossing point is measured by digital counting, whereby the amount representative of the phase position of each signal element of the digital phase-modulated wave is obtained in the form of a digital amount.
Inventors
- 👤 Hidetaka Yanagidaira
- 👤 Kazuo Kawai
- 👤 Sotokichi Shintani
- 👤 Katsuhiko Furuya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 12:54
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/233; H04L27/2332; H04L27/227; H04L27/2271; H04L27/2272; H04L27/0014; H04L2027/0024; H04L2027/0026; H04L2027/003; H04L2027/0044; H04L2027/0053
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
219 words
A system for detecting the phase of a constant phase signal element of a phase-modulated carrier wave comprising: input means for receiving the phase-modulated carrier wave; first means connected to said input means for generating a control pulse during a stable portion stable in phase of each signal element of said phase-modulated wave; second means for generating clock pulses having a repetition frequency sufficiently higher than the frequency of the carrier of said phase-modulated wave; third means for generating a reference carrier wave; fourth means operatively coupled to said input means, said first means, said second means and said third means for developing in response to said control pulse, said phase-modulated wave and said reference carrier wave a counting control signal for determining a counting period corresponding to a period between a zero crossing of the phase-modulated wave and a zero crossing of the reference carrier immediately succeeding the first mentioned zero crossing; and fifth means connected to said second means and said fourth means and receptive of Said clock pulses and siad counting control signal for counting said clock pulses only during said counting period to determine the relative phase of said reference carrier wave relative to the phase of each signal element of a phase-modulated wave and for developing digital output signals representative of said relative phase.
Claim 2
Independent Claim
219 words
A system for detecting the phase of a constant phase signal element of a phase-modulated carrier wave comprising: input means for receiving the phase-modulated carrier wave; first means connected to said input means for generating a control pulse during a stable portion stable in phase of each signal element of said phase-modulated wave; second means for generating clock pulses having a repetition frequency sufficiently higher than the frequency of the carrier of said phase-modulated wave; third means for generating a reference carrier wave; fourth means operatively coupled to said input means, said first means, said second means and said third means for developing in response to said control pulse, said phase-modulated wave and said reference carrier wave a counting control signal for determining a counting period corresponding to a period between a zero crossing of the phase-modulated wave and a zero crossing of the reference carrier immediately succeeding the first mentioned zero crossing; and fifth means connected to said second means and said fourth means and receptive of Said clock pulses and siad counting control signal for counting said clock pulses only during said counting period to determine the relative phase of said reference carrier wave relative to the phase of each signal element of a phase-modulated wave and for developing digital output signals representative of said relative phase.
Claim 3
Independent Claim
219 words
A system for detecting the phase of a constant phase signal element of a phase-modulated carrier wave comprising: input means for receiving the phase-modulated carrier wave; first means connected to said input means for generating a control pulse during a stable portion stable in phase of each signal element of said phase-modulated wave; second means for generating clock pulses having a repetition frequency sufficiently higher than the frequency of the carrier of said phase-modulated wave; third means for generating a reference carrier wave; fourth means operatively coupled to said input means, said first means, said second means and said third means for developing in response to said control pulse, said phase-modulated wave and said reference carrier wave a counting control signal for determining a counting period corresponding to a period between a zero crossing of the phase-modulated wave and a zero crossing of the reference carrier immediately succeeding the first mentioned zero crossing; and fifth means connected to said second means and said fourth means and receptive of Said clock pulses and siad counting control signal for counting said clock pulses only during said counting period to determine the relative phase of said reference carrier wave relative to the phase of each signal element of a phase-modulated wave and for developing digital output signals representative of said relative phase.
Claim 4
Independent Claim
219 words
A system for detecting the phase of a constant phase signal element of a phase-modulated carrier wave comprising: input means for receiving the phase-modulated carrier wave; first means connected to said input means for generating a control pulse during a stable portion stable in phase of each signal element of said phase-modulated wave; second means for generating clock pulses having a repetition frequency sufficiently higher than the frequency of the carrier of said phase-modulated wave; third means for generating a reference carrier wave; fourth means operatively coupled to said input means, said first means, said second means and said third means for developing in response to said control pulse, said phase-modulated wave and said reference carrier wave a counting control signal for determining a counting period corresponding to a period between a zero crossing of the phase-modulated wave and a zero crossing of the reference carrier immediately succeeding the first mentioned zero crossing; and fifth means connected to said second means and said fourth means and receptive of Said clock pulses and siad counting control signal for counting said clock pulses only during said counting period to determine the relative phase of said reference carrier wave relative to the phase of each signal element of a phase-modulated wave and for developing digital output signals representative of said relative phase.
Claim 5
Dependent Claim
106 words
A system according to claim 1, in which said second means generates clock pulses having a repetition frequency equal to 2n (n being a positive integer) times the frequency of the carrier of the phase-modulated wave, and in which said third means includes means for controlling the phase of the reference carrier relative to the phase of each signal element of the phase-modulated wave in response to lower order bits of said digital output signals of said fifth means , the higher order bits of said digital output signals being representative of quantum phase differences between the phase modulated wave signal elements and the reference carrier.
Claim 6
Dependent Claim
92 words
A system according to claim 2, wherein said third means comprises: a. circuit means receptive of the lower order bits of said digital output signals for developing control signals representative of the relative phase between said reference carrier and said signal elements, b. an oscillator; and c. a controllable frequency divider circuit receptive of an oscillator output signal and said control signals for developing said reference carrier as an output thereof, the dividing rate of said divider circuit being controlled by said control signals to control the phase of the reference carrier.
Claim 7
Dependent Claim
179 words
A system according to claim 1 wherein said fourth means comprises: a. first circuit means receptive of said phase-modulated wave for developing a first pulse train in synchronism with zero crossings of said phase-modulated wave; b. a first flip-flop set by said control pulse to develop an output signal; c. a logic gate circuit enabled by the output signal of said first flip-flop to pass said first pulse train therethrough; d. second circuit means receptive of said reference carrier wave for developing a second pulse train in synchronism with zero crossings of said reference carrier wave; e. a second flip-flop receptive of portions of said first pulse train passed through said logic gate circuit and said second pulse train and set to develop said counting control signal by a pulse of said first pulse train and reset to terminate said counting control signal by the first pulse of said second pulse train occurring subsequent to said pulse of said first pulse train; and f. circuit means for resetting said flip-flop in response to the resetting of said second flip-flop.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-04-21 | 1978-10-21 | 1979-04-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-04-21 | 1982-10-21 | 1983-04-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-04-21 | 1986-10-21 | 1987-04-22 | $7700.00 | Window Closed / Lapsed |