US3879663A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Delta modulator utilizing a duty cycle circuit
Assignee: RCA Corp
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Filing: 1973-10-09
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Granted: 1975-04-22
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Expires: 1993-10-09
Abstract
Abstract A delta modulation system for encoding and decoding an analog input signal. The encoder includes a comparator to generate an encoded digital signal representing the analog input signal and a duty cycle circuit to represent the slope of the analog input signal. The decoder utilizes a similar duty cycle circuit which operates on the encoded digital signal received in order to translate the encoded signal into an analog output signal.
Inventors
- 👤 Jr Ellwood Patrick Mcgrogan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 06:47
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/02; H03M3/022; H03M3/024
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
314 words
A delta modulation system for translating an analog input signal into an encoded digital signal and for decoding said encoded digital signal into an analog output signal, said system comprising: an encoder station comprising: a. a signal comparator means for periodically comparing the amplitudes of said analog input signal and a feedback signal applied respectively to first and second input terminals thereof and for providing a comparator output signal having a first or a second voltage level at an output terminal thereof for each of said periodic comparisons; b. an encoder pulse train generating means responsive to said comparator output signal for providing a pulse train having a duty cycle dependent upon the results of said periodic comparisons, the duty cycle of said pulse train corresponding to the slope of said analog input signal, said encoder pulse train generating means comprising: means for generating a sawtooth waveform; means for providing a second signal having an amplitude dependent upon the results of said comparisons in saId signal comparator means; and means for comparing said second signal and said sawtooth waveform and for providing said corresponding pulse train; c. an encoder integrating means for integrating said pulse train and for providing said feedback signal, corresponding to the integral of said pulse train, at the second input terminal of said comparator means; d. means associated with said encoder pulse train generating means for providing said encoded digital output signal to a transmission medium; and a decoder station comprising: a. means for receiving said encoded digital signal from said transmission medium; b. a decoder pulse train generating means responsive to said encoded digital signal for providing a decoder pulse train having a duty cycle depending upon the encoded information in said encoded digital signal; and c. decoder integrating means for integrating said decoder pulse train and for providing said analog output signal corresponding to said analog input signal.
Claim 2
Dependent Claim
314 words
A delta modulation system for translating an analog input signal into an encoded digital signal and for decoding said encoded digital signal into an analog output signal, said system comprising: an encoder station comprising: a. a signal comparator means for periodically comparing the amplitudes of said analog input signal and a feedback signal applied respectively to first and second input terminals thereof and for providing a comparator output signal having a first or a second voltage level at an output terminal thereof for each of said periodic comparisons; b. an encoder pulse train generating means responsive to said comparator output signal for providing a pulse train having a duty cycle dependent upon the results of said periodic comparisons, the duty cycle of said pulse train corresponding to the slope of said analog input signal, said encoder pulse train generating means comprising: means for generating a sawtooth waveform; means for providing a second signal having an amplitude dependent upon the results of said comparisons in saId signal comparator means; and means for comparing said second signal and said sawtooth waveform and for providing said corresponding pulse train; c. an encoder integrating means for integrating said pulse train and for providing said feedback signal, corresponding to the integral of said pulse train, at the second input terminal of said comparator means; d. means associated with said encoder pulse train generating means for providing said encoded digital output signal to a transmission medium; and a decoder station comprising: a. means for receiving said encoded digital signal from said transmission medium; b. a decoder pulse train generating means responsive to said encoded digital signal for providing a decoder pulse train having a duty cycle depending upon the encoded information in said encoded digital signal; and c. decoder integrating means for integrating said decoder pulse train and for providing said analog output signal corresponding to said analog input signal.
Claim 3
Dependent Claim
314 words
A delta modulation system for translating an analog input signal into an encoded digital signal and for decoding said encoded digital signal into an analog output signal, said system comprising: an encoder station comprising: a. a signal comparator means for periodically comparing the amplitudes of said analog input signal and a feedback signal applied respectively to first and second input terminals thereof and for providing a comparator output signal having a first or a second voltage level at an output terminal thereof for each of said periodic comparisons; b. an encoder pulse train generating means responsive to said comparator output signal for providing a pulse train having a duty cycle dependent upon the results of said periodic comparisons, the duty cycle of said pulse train corresponding to the slope of said analog input signal, said encoder pulse train generating means comprising: means for generating a sawtooth waveform; means for providing a second signal having an amplitude dependent upon the results of said comparisons in saId signal comparator means; and means for comparing said second signal and said sawtooth waveform and for providing said corresponding pulse train; c. an encoder integrating means for integrating said pulse train and for providing said feedback signal, corresponding to the integral of said pulse train, at the second input terminal of said comparator means; d. means associated with said encoder pulse train generating means for providing said encoded digital output signal to a transmission medium; and a decoder station comprising: a. means for receiving said encoded digital signal from said transmission medium; b. a decoder pulse train generating means responsive to said encoded digital signal for providing a decoder pulse train having a duty cycle depending upon the encoded information in said encoded digital signal; and c. decoder integrating means for integrating said decoder pulse train and for providing said analog output signal corresponding to said analog input signal.
Claim 4
Dependent Claim
314 words
A delta modulation system for translating an analog input signal into an encoded digital signal and for decoding said encoded digital signal into an analog output signal, said system comprising: an encoder station comprising: a. a signal comparator means for periodically comparing the amplitudes of said analog input signal and a feedback signal applied respectively to first and second input terminals thereof and for providing a comparator output signal having a first or a second voltage level at an output terminal thereof for each of said periodic comparisons; b. an encoder pulse train generating means responsive to said comparator output signal for providing a pulse train having a duty cycle dependent upon the results of said periodic comparisons, the duty cycle of said pulse train corresponding to the slope of said analog input signal, said encoder pulse train generating means comprising: means for generating a sawtooth waveform; means for providing a second signal having an amplitude dependent upon the results of said comparisons in saId signal comparator means; and means for comparing said second signal and said sawtooth waveform and for providing said corresponding pulse train; c. an encoder integrating means for integrating said pulse train and for providing said feedback signal, corresponding to the integral of said pulse train, at the second input terminal of said comparator means; d. means associated with said encoder pulse train generating means for providing said encoded digital output signal to a transmission medium; and a decoder station comprising: a. means for receiving said encoded digital signal from said transmission medium; b. a decoder pulse train generating means responsive to said encoded digital signal for providing a decoder pulse train having a duty cycle depending upon the encoded information in said encoded digital signal; and c. decoder integrating means for integrating said decoder pulse train and for providing said analog output signal corresponding to said analog input signal.
Claim 5
Dependent Claim
21 words
The system according to claim 1 wherein said encoder and decoder pulse train generating means each includes a multistage shift register.
Claim 6
Dependent Claim
41 words
The system according to claim 2 wherein said encoder and decoder pulse train generating means each further comprises an encoder logic detection means and a decoder logic detection means respectively coupled to the encoder shift register and the decoder shift register.
Claim 7
Dependent Claim
31 words
The system according to claim 3 wherein said encoding station further comprises an exclusive OR circuit responsive to said corresponding pulse train and a signal derived from said corresponding shift register.
Claim 8
Dependent Claim
214 words
A delta modulator circuit for translating an analog input signal into an encoded digital output signal, said circuit comprising: a first signal comparator means for periodically comparing the amplitudes of said input signal and a feedback signal applied respectively to first and second input terminals thereof and for providing an output signal having a first or a second voltage level at an output terminal thereof for each comparison performed by said comparator; a pulse train generating means responsive to said output signal from said first comparator means for providing a pulse train having a duty cycle dependent upon the results of said periodic comparisons, the duty cycle of said pulse train corresponding to the slope of said analog input signal, said pulse train generating means comprising: means for generating a sawtooth waveform; means for providing a second signal having an amplitude dependent upon the results of said comparisons in said first signal comparator means; and means for comparing said sawtooth waveform and said second signal for providing said pulse train; integrating means for integrating said pulse train and for providing said feedback signal corresponding to the integrated value of said pulse train at said comparator second input terminal; and means associated with said pulse train generating means for providing said encoded digital output signal.
Claim 9
Dependent Claim
214 words
A delta modulator circuit for translating an analog input signal into an encoded digital output signal, said circuit comprising: a first signal comparator means for periodically comparing the amplitudes of said input signal and a feedback signal applied respectively to first and second input terminals thereof and for providing an output signal having a first or a second voltage level at an output terminal thereof for each comparison performed by said comparator; a pulse train generating means responsive to said output signal from said first comparator means for providing a pulse train having a duty cycle dependent upon the results of said periodic comparisons, the duty cycle of said pulse train corresponding to the slope of said analog input signal, said pulse train generating means comprising: means for generating a sawtooth waveform; means for providing a second signal having an amplitude dependent upon the results of said comparisons in said first signal comparator means; and means for comparing said sawtooth waveform and said second signal for providing said pulse train; integrating means for integrating said pulse train and for providing said feedback signal corresponding to the integrated value of said pulse train at said comparator second input terminal; and means associated with said pulse train generating means for providing said encoded digital output signal.
Claim 10
Dependent Claim
45 words
The circuit according to claim 5 wherein said pulse train generating means includes a multistage shift register connected to the output terminal of said first comparator means and wherein said encoded digital output signal is derived from one of the stages of said shift register.
Claim 11
Dependent Claim
53 words
The circuit according to claim 6 wherein said pulse train generating means further comprises a logic detection means connected to said shift register for detecting the occurrence of a consecutive series of first voltage levels at the output terminal of said first comparator means and for providing a binary signal in response thereto.
Claim 12
Dependent Claim
280 words
A delta modulator circuit for translating an analog input signal into an encoded digital output signal, said circuit comprising: first comparison means for periodically comparing the amplitude of said input signal with the amplitude of a feedback signal and for providing a comparator outPut signal having a first voltage level when the input signal amplitude is greater than the feedback signal amplitude and for providing a second voltage level when the input signal amplitude is less than the feedback signal amplitude; clock means for providing a clock signal; detecting means responsive to said comparator output signal and to said clock signal for detecting the occurrence of a consecutive sequence of first voltage levels and for providing a binary signal in response thereto and for providing another signal corresponding to said clock signal in the absence of said consecutive sequence of first voltage levels; means connected to said clock means for providing a sawtooth waveform; means connected to said detecting means for providing a second signal wave having an amplitude dependent upon the results of the comparisons in said first comparison means; second comparator means for comparing the amplitudes of said sawtooth waveform and said second signal wave for providing a first pulse train signal whose duty cycle is related to the comparison of the amplitudes of said sawtooth signal wave and said second signal wave; means associated with said detecting means for providing said encoded digital output signal; means responsive to said first pulse train and to a digital signal derived from said detecting means for providing a second pulse train; and means for integrating said second pulse train and for providing said feedback signal to said first comparison means.
Claim 13
Dependent Claim
280 words
A delta modulator circuit for translating an analog input signal into an encoded digital output signal, said circuit comprising: first comparison means for periodically comparing the amplitude of said input signal with the amplitude of a feedback signal and for providing a comparator outPut signal having a first voltage level when the input signal amplitude is greater than the feedback signal amplitude and for providing a second voltage level when the input signal amplitude is less than the feedback signal amplitude; clock means for providing a clock signal; detecting means responsive to said comparator output signal and to said clock signal for detecting the occurrence of a consecutive sequence of first voltage levels and for providing a binary signal in response thereto and for providing another signal corresponding to said clock signal in the absence of said consecutive sequence of first voltage levels; means connected to said clock means for providing a sawtooth waveform; means connected to said detecting means for providing a second signal wave having an amplitude dependent upon the results of the comparisons in said first comparison means; second comparator means for comparing the amplitudes of said sawtooth waveform and said second signal wave for providing a first pulse train signal whose duty cycle is related to the comparison of the amplitudes of said sawtooth signal wave and said second signal wave; means associated with said detecting means for providing said encoded digital output signal; means responsive to said first pulse train and to a digital signal derived from said detecting means for providing a second pulse train; and means for integrating said second pulse train and for providing said feedback signal to said first comparison means.
Claim 14
Dependent Claim
40 words
The circuit according to claim 8 wherein said detecting means comprises: a multi-stage shift register responsive to said first comparison means output signal; and logic means coupled to each stage of said multi-stage shift register and to said clock means.
Claim 15
Dependent Claim
20 words
The circuit according to claim 9 wherein said means for providing said second pulse train comprises an exclusive OR circuit.
Claim 16
Dependent Claim
130 words
In a delta modulator system a circuit for decoding an encoded digital signal and for providing an analog output signal, said circuit comprising: means for receiving said encoded digital signal from a transmission medium; a decoder pulse train generating means responsive to said encoded digital signal for providing a pulse train having a duty cycle depending upon the encoded information in said encoded digital signal said decoder pulse train generating means comprising: means for generating a sawtooth waveform; means for providing a second signal wave having an amplitude dependent upon the received encoded digital signal; and means for comparing said second signal wave and said sawtooth waveform for providing said decoder pulse train; a decoder integrating means for integrating said decoder pulse train and for providing said analog output signal.
Claim 17
Dependent Claim
130 words
In a delta modulator system a circuit for decoding an encoded digital signal and for providing an analog output signal, said circuit comprising: means for receiving said encoded digital signal from a transmission medium; a decoder pulse train generating means responsive to said encoded digital signal for providing a pulse train having a duty cycle depending upon the encoded information in said encoded digital signal said decoder pulse train generating means comprising: means for generating a sawtooth waveform; means for providing a second signal wave having an amplitude dependent upon the received encoded digital signal; and means for comparing said second signal wave and said sawtooth waveform for providing said decoder pulse train; a decoder integrating means for integrating said decoder pulse train and for providing said analog output signal.
Claim 18
Dependent Claim
29 words
The circuit according to claim 11 wherein said decoder pulse train generating means includes a multistage shift register responsive to the encoded digital signal received from said transmission medium.
Claim 19
Dependent Claim
25 words
The circuit according to claim 12 wherein said decoder pulse train generating means further comprises a decoder logic detection means connected to said shift register.
References Cited (Backward Citations)
US3746990A
Cited
US3806806A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-04-21 | 1978-10-21 | 1979-04-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-04-21 | 1982-10-21 | 1983-04-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-04-21 | 1986-10-21 | 1987-04-22 | $7700.00 | Window Closed / Lapsed |