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US3878535A Expired / Lapsed US ⏱️ 0.0 years remaining

Phase locked loop method of synchro-to-digital conversion

Assignee: Sundstrand Corp
•
Filing: 1972-06-08
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Granted: 1975-04-15
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Expires: 1992-06-08
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Abstract

Abstract A circuit for converting analog signals angularly related to the position of a rotor of a synchro or resolver or the like into digital signals representing the rotor position utilizes a phase locked loop circuit with a voltage controlled oscillator from which is derived a phase signal shifted in phase with respect to the excitation signal in direct proportion to rotor position. A phase measuring circuit determines the number of cycles of the clock signal occurring during the time period corresponding to the phase difference between the phase signal and the excitation signal to produce a digital signal representative of the rotor position. The voltage controlled oscillator has a frequency which is variable in direct proportion with the frequency of the excitation signal to eliminate error in the phase measuring circuit due to frequency changes in the excitation signal.

Inventors

  • 👤 Frank Twiss

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 03:14
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/64; H03M1/645

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 253 words
In a system having a primary winding coupled with a source of energization signal and a plurality of secondary windings each having an alternating signal induced therein with an amplitude dependent upon the angular position of said primary winding relative to said secondary windings, a circuit for determining the angular position, comprising: input means coupled to the plurality of secondary windings for providing at least two alternating input signals carrying amplitude information related to the amplitudes of the alternating signals from the plurality of secondary windings; controllable oscillator means for generating cyclical signals having a frequency and phase varying in proportion to signals at an error input; a phase locked loop for controlling the oscillator means to cause the cyclical signals to have a frequency variable in direct proportion with the frequency of the energization signal and a phase directly proportional with said angular position, including analog gate means coupled to the input means for sampling the alternating input signals to develop sampled signals, means coupling the oscillator means to the analog gate means for causing the analog gate means to sample portions of the alternating input signals in response to the phase of the cyclical signals, and error means connecting the analog means to the error input for varying the phase of the cyclical signals under control of the sampled signals; and phase comparator means coupled to the oscillator means and to the source for comparing the relative phase between the cyclical signals and the energization signal to determine said angular position.
Claim 2
Dependent Claim 253 words
In a system having a primary winding coupled with a source of energization signal and a plurality of secondary windings each having an alternating signal induced therein with an amplitude dependent upon the angular position of said primary winding relative to said secondary windings, a circuit for determining the angular position, comprising: input means coupled to the plurality of secondary windings for providing at least two alternating input signals carrying amplitude information related to the amplitudes of the alternating signals from the plurality of secondary windings; controllable oscillator means for generating cyclical signals having a frequency and phase varying in proportion to signals at an error input; a phase locked loop for controlling the oscillator means to cause the cyclical signals to have a frequency variable in direct proportion with the frequency of the energization signal and a phase directly proportional with said angular position, including analog gate means coupled to the input means for sampling the alternating input signals to develop sampled signals, means coupling the oscillator means to the analog gate means for causing the analog gate means to sample portions of the alternating input signals in response to the phase of the cyclical signals, and error means connecting the analog means to the error input for varying the phase of the cyclical signals under control of the sampled signals; and phase comparator means coupled to the oscillator means and to the source for comparing the relative phase between the cyclical signals and the energization signal to determine said angular position.
Claim 3
Dependent Claim 114 words
The circuit of claim 1 wherein the oscillator means comprises a clock for generating the cyclical signals at a frequency which is a multiple of the frequency of the energization signal and a frequency divider circuit driven by the clock to develop cyclical signals having frequencies that are submultiples of the multiple frequency cyclical signals, the coupling means connects the frequency divider circuit to the analog gate means to control sampling in response to the submultiple frequency cyclical signals, and the phase comparator means includes a gate coupled to the clock for passing the multiple frequency cyclical signals in proportion to the relative phase between the submultiple frequency cyclical signals and the energization signal.
Claim 4
Dependent Claim 35 words
The circuit of claim 2 wherein the phase comparator means further includes counter means for counting the multiple frequency cyclical signals passed by the gate to develop a digital signal representative of the angular position.
Claim 5
Dependent Claim 33 words
The circuit of claim 1 wherein said error means includes integrating means coupled to the analog gate means for integrating the sampled signals to develop an error signal coupled to the error input.
Claim 6
Dependent Claim 34 words
The circuit of claim 4 wherein said error means includes summing means connecting the analog gate means to the integrating means for summing the sampled signals before the integrating means integrates the sampled signals.
Claim 7
Dependent Claim 24 words
The circuit of claim 1 wherein said analog gate means selects 180* portions from each of the alternating input signals during each cycle thereof.
Claim 8
Dependent Claim 69 words
The circuit of claim 1 wherein said analog gate means comprises an analog gate switch associated with each of said plurality of secondary windings, the input means directly couples each of the secondarY windings to a different one of the analog gate switches, each of said analog gate switches being responsive to the phase of the cyclical signals to select a portion of the alternating input signals coupled thereto.

References Cited (Backward Citations)

US2991462A Cited
US3284795A Cited
US3358280A Cited
US3438026A Cited
US3508252A Cited
US3573794A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-04-14 1978-10-14 1979-04-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-04-14 1982-10-14 1983-04-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-04-14 1986-10-14 1987-04-15 $7700.00 Window Closed / Lapsed

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