US3878533A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High speed analog to digital converter recirculating analog input for high speed output
Assignee: SCOPE ACQUISITION CORP A DE CORP
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Filing: 1974-03-22
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Granted: 1975-04-15
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Expires: 1994-03-22
Abstract
Abstract In an analog to digital converter an analog voltage is sampled. To provide a digital output indicative of one sample, the analog voltage sample is recirculated. During each successive circulation, a successively less significant bit of the digital output is determined by comparing a DC level dependent upon the analog input level to a reference level in a single level comparator. A power divider in the single level comparator couples direct current inputs to the comparator and to a combiner. The combiner has an output connected to a feedback loop including a hard limited modulated channel, the output of which is amplified and coupled to the input of the power divider. The comparator thus provides successive digital bits upon the completion of each recirculation.
Inventors
- 👤 Norbert Kleiner
- 👤 Hill Montague
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 20:07
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/38; H03M1/40
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
215 words
An analog to digital converter for providing a binary output indicative of an analog input comprising, in combination: a switching circuit connected between the analog signal and an output terminal and being operable for a selectable period; a single level comparator having an input terminal connected to the output of said switch and an output terminal, and further comprising a feedback terminal; and a hard limited modulated channel connected between said feedback terminal and a second input of said switch, said switch including timing means for coupling a sample to said single level comparator and for connecting recirculated feedback from said feedback terminal to said input of said single level comparator, said single level comparator comprising a power divider having an input connected to the input of said single level comparator and first and second outputs, a one-bit comparator having a first input connected to an output of said power divider and a second input connected to a source of reference potential and an output connected to said output terminal, a combiner having a first input coupled to said onebit comparator and a second input coupled to said power divider and an output coupled to said feedback terminal, and said hard limited modulated channel comprising a modulator, delay means and a demodulator connected in series.
Claim 2
Dependent Claim
215 words
An analog to digital converter for providing a binary output indicative of an analog input comprising, in combination: a switching circuit connected between the analog signal and an output terminal and being operable for a selectable period; a single level comparator having an input terminal connected to the output of said switch and an output terminal, and further comprising a feedback terminal; and a hard limited modulated channel connected between said feedback terminal and a second input of said switch, said switch including timing means for coupling a sample to said single level comparator and for connecting recirculated feedback from said feedback terminal to said input of said single level comparator, said single level comparator comprising a power divider having an input connected to the input of said single level comparator and first and second outputs, a one-bit comparator having a first input connected to an output of said power divider and a second input connected to a source of reference potential and an output connected to said output terminal, a combiner having a first input coupled to said onebit comparator and a second input coupled to said power divider and an output coupled to said feedback terminal, and said hard limited modulated channel comprising a modulator, delay means and a demodulator connected in series.
Claim 3
Dependent Claim
31 words
An analog to digital converter according claim 1 in which said modulator in said hard limited modulated channel comprises a voltage controlled oscillator and in which said demodulator comprises a discriminator.
Claim 4
Dependent Claim
60 words
An analog to digital converter according to claim 1 wherein limiting means are coupled to the input terminal of said switch for normalizing peaks of the input voltage to said analog to digItal converter to a level of Vmax and in which the value of reference potential connected to said one-bit comparator in said single level comparator is 1/2 Vmax.
Claim 5
Dependent Claim
28 words
An analog to digital converter according to claim 3 further comprising an attenuator connected between the output of said one-bit comparator and said first input of said combiner.
Claim 6
Dependent Claim
36 words
The analog to digital converter of claim 4 in which the delay period of said delay means in said hard limited modulated channel is set to be equal to the period of said input switching circuit.
Claim 7
Dependent Claim
28 words
An analog to digital converter according to claim 5 further comprising an amplifier connected between said hard limited modulated channel and said second input of said switching circuit.
Claim 8
Dependent Claim
33 words
An analog to digital converter according to claim 6 in which said modulator in said hard limited modulated channel comprises a phase modulator and in which said demodulator comprises a double balanced mixer.
Claim 9
Dependent Claim
104 words
An analog to digital converter according to claim 7 in which said attenuator is adjusted to provide an output of zero in response to a logic zero at the output of said one-bit comparator and to provide an output of one half Vmax in response to a logic one output at the output of said one-bit comparator, said power divider provides a three dB reduction at said second output, and in which said amplifier provides a multiplication factor of two, whereby on successive recirculations the input to said switch means is raised to the range of zero to Vmax and losses are compensated for.
Claim 10
Dependent Claim
34 words
An analog to digital converter according to claim 8 further comprising a limiter in said hard limited modulated channel connected between said delay means and said double balanced mixer whereby signal fluctuations are minimized.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-04-14 | 1978-10-14 | 1979-04-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-04-14 | 1982-10-14 | 1983-04-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-04-14 | 1986-10-14 | 1987-04-15 | $7700.00 | Window Closed / Lapsed |