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US3878530A Expired / Lapsed US ⏱️ 0.0 years remaining

Radar video processing apparatus

Assignee: Raytheon Co
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Filing: 1965-03-15
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Granted: 1975-04-15
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Expires: 1985-03-15
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Abstract

Abstract 1. An apparatus for processing successive video sweeps generated by a radar system and quantized into a series of range bins each including a 1 or a 0 representing a target hit or no target hit, respectively, said apparatus comprising: a memory device have a plurality of channels including 1, 2, 3, . . . (n-1), n channels for storing n successive quantized video sweeps from said radar system, n being an integer no less than three, and A, B, active and reject channels for storing first and second code bits, active bits and reject bits, respectively; means coupled to said memory device and including a read address and a write address for reading from and writing into successive range bins of said plurality of channels in a direction corresponding to increasing ranges; means coupled from said read to said write address for transferring said quantized video from said 1, 2, 3, . . . (n-1) channels to said 2, 3, . . . n channels, respectively; means coupled from said n channels of said read address to said active bit channel of said write address for generating an active bit in response to m 1''s from the respective range bins of said n channels, m being an integer less than n; means coupled from said n channels of said read address to said active bit channel of said write address for erasing said active bit and any corresponding bit in said reject channel in response to a predetermined number less than m 1''s from the respective range bins of said n channels; means coupled from said A, B and reject channels of said read address to said A, B, reject and said 1 channel of said n channels of said write address and responsive to said quantized video sweeps generated by said radar system for generating and writing a code in said A and B channels indicative of predetermined successive occurrences of 1''s in said quantized video sweeps, for generating and writing 1 bits in said reject channel indicative of predetermined successive occurrences of 1''s in corresponding range bins of no less than two successive video sweeps, and for writing said quantized video in said 1 channel of said n channels; and utilization means responsive to the simultaneous existence of 1''s in said active channel and to the non-existence of 1''s in said reject channel for indicating targets detected by said radar.

Inventors

  • 👤 Richard Dean Wilmot

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 06:46
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/66; G01S13/72; G01S7/00; G01S7/02; G01S7/28; G01S7/285; G01S7/292; G01S7/2923

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 402 words
An apparatus for processing successive video sweeps generated by a radar system and quantized into a series of range bins each including a 1 or a 0 representing a target hit or no target hit, respectively, said apparatus comprising: a memory device have a plurality of channels including 1, 2, 3, . . . (n-1), n channels for storing n successive quantized video sweeps from said radar system, n being an integer no less than three, and A, B, active and reject channels for storing first and second code bits, active bits and reject bits, respectively; means coupled to said memory device and including a read address and a write address for reading from and writing into successive range bins of said plurality of channels in a direction corresponding to increasing ranges; means coupled from said read to said write address for transferring said quantized video from said 1, 2, 3, . . . (n-1) channels to said 2, 3, . . . n channels, respectively; means coupled from said n channels of said read address to said active bit channel of said wrIte address for generating an active bit in response to m 1''s from the respective range bins of said n channels, m being an integer less than n; means coupled from said n channels of said read address to said active bit channel of said write address for erasing said active bit and any corresponding bit in said reject channel in response to a predetermined number less than m 1''s from the respective range bins of said n channels; means coupled from said A, B and reject channels of said read address to said A, B, reject and said 1 channel of said n channels of said write address and responsive to said quantized video sweeps generated by said radar system for generating and writing a code in said A and B channels indicative of predetermined successive occurrences of 1''s in said quantized video sweeps, for generating and writing 1 bits in said reject channel indicative of predetermined successive occurrences of 1''s in corresponding range bins of no less than two successive video sweeps, and for writing said quantized video in said 1 channel of said n channels; and utilization means responsive to the simultaneous existence of 1''s in said active channel and to the non-existence of 1''s in said reject channel for indicating targets detected by said radar.
Claim 2
Independent Claim 402 words
An apparatus for processing successive video sweeps generated by a radar system and quantized into a series of range bins each including a 1 or a 0 representing a target hit or no target hit, respectively, said apparatus comprising: a memory device have a plurality of channels including 1, 2, 3, . . . (n-1), n channels for storing n successive quantized video sweeps from said radar system, n being an integer no less than three, and A, B, active and reject channels for storing first and second code bits, active bits and reject bits, respectively; means coupled to said memory device and including a read address and a write address for reading from and writing into successive range bins of said plurality of channels in a direction corresponding to increasing ranges; means coupled from said read to said write address for transferring said quantized video from said 1, 2, 3, . . . (n-1) channels to said 2, 3, . . . n channels, respectively; means coupled from said n channels of said read address to said active bit channel of said wrIte address for generating an active bit in response to m 1''s from the respective range bins of said n channels, m being an integer less than n; means coupled from said n channels of said read address to said active bit channel of said write address for erasing said active bit and any corresponding bit in said reject channel in response to a predetermined number less than m 1''s from the respective range bins of said n channels; means coupled from said A, B and reject channels of said read address to said A, B, reject and said 1 channel of said n channels of said write address and responsive to said quantized video sweeps generated by said radar system for generating and writing a code in said A and B channels indicative of predetermined successive occurrences of 1''s in said quantized video sweeps, for generating and writing 1 bits in said reject channel indicative of predetermined successive occurrences of 1''s in corresponding range bins of no less than two successive video sweeps, and for writing said quantized video in said 1 channel of said n channels; and utilization means responsive to the simultaneous existence of 1''s in said active channel and to the non-existence of 1''s in said reject channel for indicating targets detected by said radar.
Claim 3
Dependent Claim 247 words
The apparatus for processing successive video sweeps generated by a radar system and quantized into a series of range bins each including a 1 or a 0 representing a target hit or no target hit, respectively, as defined in claim 1 wherein said means coupled from said A, B and reject channels of said read address to said A, B, reject and said 1 channel of said n channels of said write address and responsive to said quantized video sweeps generated by said radar system includes a multiple-stage shift register having an input responsive to said quantized video sweeps and an output connected to said 1 channel of said n channels of said write address; means coupled to no less than three successive stages of said shift register and having an output coupled to said A channel of said write address for writing a 1 therein in response to 1''s in each of said three successive stages; means coupled to no less than four successive stages of said shift register and having an output coupled to said B channel of said write address for writing a 1 therein in response to 1''s in each of said four successive stages; and means coupled to no less than five successive stages of said shift register and having an output coupled to said A and B channels of said write address for writing 1''s therein in response to 1''s in each of said five successive stages of said shift register.
Claim 4
Dependent Claim 182 words
The apparatus for processing successive video sweeps generated by a radar system and quantized into a series of range bins each including a 1 or a 0 representing a target hit or no target hit, respectively, as defined in claim 2, wherein said means coupled from said A, B and reject channels of said read address to said A, B, reject and said 1 channel of said n channels of said write address and responsive to said quantized video sweeps generated by said radar system additionally includes means responsive to said A and B channels from said read address and coupled to said no less than three and said no less than four successive stages of said shift register and having an output coupled to said A and B channels of said write address for writing 1''s therein in respnose to a 1 in either of said A and B channels from said read address together with 1''s in each of said no less than three of 1''s in each of said no less than four successive stages of said shift register.
Claim 5
Dependent Claim 204 words
The apparatus for processing successive video sweeps generated by a radar system and quantized into a series of range bins each including a 1 or a 0 representing a target hit or no target hit, respectively, as defined in claim 1, wherein said means coupled from said A, B and reject channels of said read address to said A, B, reject and said 1 channel of said n channels of said write address and responsive to said quantized video sweeps generated by said radar system includes a multiple-stage shift register having an input responsive to said quantized video sweeps and an output connected to said 1 channel of said n channels of said write address; and means responsive to said A and B channels of said read address and coupled to no less than three successive stages of said shift register and having an output coupled to said reject channel of said write address for writing a 1 bit therein in response to 1''s in each of said no less than three successive stages together with binary code signals from said A and B channels of said read address indicative of five successive 1''s in corresponding range bins of the previous quantized video sweep.
Claim 6
Dependent Claim 204 words
The apparatus for processing successive video sweeps generated by a radar system and quantized into a series of range bins each including a 1 or a 0 representing a target hit or no target hit, respectively, as defined in claim 1, wherein said means coupled from said A, B and reject channels of said read address to said A, B, reject and said 1 channel of said n channels of said write address and responsive to said quantized video sweeps generated by said radar system includes a multiple-stage shift register having an input responsive to said quantized video sweeps and an output connected to said 1 channel of said n channels of said write address; and means responsive to said A and B channels of said read address and coupled to no less than four successive stages of said shift register and having an output coupled to said reject channel of said write address for writing a 1 bit therein in response to 1''s in each of said no less than four successive stages together with binary code signals from said A and B channels of said read address indicative of four successive 1''s in corresponding range bins of the previous quantized video sweep.
Claim 7
Dependent Claim 204 words
The apparatus for processing successive video sweeps generated by a radar system and quantized into a series of range bins each including a 1 or a 0 representing a target hit or no target hit, respectively, as defined in claim 1 wherein said means coupled from said A, B and reject channels of said read address to said A, B, reject and said 1 channel of said n channels of said write address and responsive to said quantized video sweeps generated by said radar system includes a multiple-stage shift register having an input responsive to said quantized video sweeps and an output connected to said 1 channel of said n channels of said write address; and means responsive to said A and B channels of said read address and coupled to no less than five successive stages of said shift register and having an output coupled to said reject channel of said write address for writing a 1 bit therein in response to 1''s in each of said no less than five successive stages together with binary code signals from said A and B channels of said read address indicative of three successive 1''s in corresponding range bins of the previous quantized video sweep.
Claim 8
Dependent Claim 165 words
The apparatus for processing successive video sweeps generated by a radar system and quantized into a series of range bins each including a 1 or a 0 representing a target hit or a no target hit, respectively, as defined in claim 1, wherein said means coupled from said A, B and reject channels of said read address to said A, B, reject and said 1 channel of said n channels of said write address and responsive to said quantized video sweeps generated by said Radar system includes a multiple-stage shift register having an input responsive to said quantized video sweeps and an output connected to said 1 channel of said n channels of said write address; and means coupled to no less than six successive stages of said shift register and having an output coupled to said reject channel of said write address for writing 1 bits therein corresponding to 1''s in each of said no less than six successive stages of said shift register.
Claim 9
Dependent Claim 146 words
The apparatus for processing successive video sweeps generated by a radar system and quantized into a series of range bins each including a 1 or a 0 representing a target hit or no target hit, respectively, as defined in claim 1, wherein said means coupled from said A, B and reject channels of said read address to said A, B, reject and said 1 channel of said n channels of said write address and responsive to said quantized video sweeps generated by said radar system for generating and writing a 1 bit in said reject channel indicative of predetermined successive occurrences of 1''s in corresponding range bins of no less than two successive video sweeps additionally includes means for delaying the initial 1 bit of each plurality of 1 bits written in said reject channel thereby to allow clutter outline and multiple targets to be processed.

References Cited (Backward Citations)

US3727215A Cited
US3503068A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-04-14 1978-10-14 1979-04-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-04-14 1982-10-14 1983-04-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-04-14 1986-10-14 1987-04-15 $7700.00 Window Closed / Lapsed

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