US3878474A
Expired / Lapsed
US
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Phase locked loop
Assignee: AT&T Inc
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Filing: 1974-06-17
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Granted: 1975-04-15
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Expires: 1994-06-17
Abstract
Abstract The jitter bandwidth of a phase locked loop is significantly reduced by the proper selection of the amplitude and phase of the component of input signal injected into the loop voltage controlled oscillator.
Inventors
- 👤 Peter Klaus Runge
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 07:49
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/24; H03L7/06; H03L7/08; H03L7/083
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
118 words
A phase locked loop including: a phase detector for generating an error signal; a voltage controlled oscillator whose frequency is varied by said error signal; means for coupling said error signal to said oscillator; means for coupling said oscillator to said phase detector; means for coupling an input signal to said phase detector; and means for injecting a component of said input signal into said voltage controlled oscillator; CHARACTERIZED IN THAT: the phase angle, theta , of the component of input signal injected into said oscillator, relative to the phase of the oscillator signal at the point of injection, is substantially different than zero in order to significantly reduce the jitter bandwidth of the said phase locked loop.
Claim 2
Dependent Claim
118 words
A phase locked loop including: a phase detector for generating an error signal; a voltage controlled oscillator whose frequency is varied by said error signal; means for coupling said error signal to said oscillator; means for coupling said oscillator to said phase detector; means for coupling an input signal to said phase detector; and means for injecting a component of said input signal into said voltage controlled oscillator; CHARACTERIZED IN THAT: the phase angle, theta , of the component of input signal injected into said oscillator, relative to the phase of the oscillator signal at the point of injection, is substantially different than zero in order to significantly reduce the jitter bandwidth of the said phase locked loop.
Claim 3
Dependent Claim
21 words
The phase locked loop according to claim 1 where said phase angle theta lies within the range between -15* and -25*.
Claim 4
Dependent Claim
50 words
The phase locked loop in accordance with claim 1 wherein the amplitude, Ii, of the component of input signal injected into said oscillator is related to said phase angle theta by Ii M/ Square Root 1 + N Sin theta , where M and N are constants of the system.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-04-14 | 1978-10-14 | 1979-04-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-04-14 | 1982-10-14 | 1983-04-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-04-14 | 1986-10-14 | 1987-04-15 | $7700.00 | Window Closed / Lapsed |