US3876987A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multiprocessor computer systems
Assignee: GPT INTERNATIONAL Ltd
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Filing: 1973-04-24
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Granted: 1975-04-08
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Expires: 1993-04-24
Abstract
Abstract A Multiprocessor computer system in which each processor has a fault channel which can be accessed by another processor of the system, thereby permitting operation of the former processor to be monitored by the latter. The fault channel effectively provides the latter processor with all the facilities which are provided to a human operator by the control console of a conventional computer. Each processor is arranged to open its fault channel, and issue a request for attention by another processor, whenever a fault is detected by it.
Inventors
- 👤 Robin Edward Dalton
- 👤 Brian Harry Phillips
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 21:05
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/2205; G06F11/2236; G06F11/2242; G06F11/26; G06F11/273; G06F11/2736; H; H04; H04Q; H04Q3/00; H04Q3/42; H04Q3/54; H04Q3/545; H04Q3/54541; H04Q3/5455
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
220 words
A Multiprocessor computer system comprising: a. a plurality of independent data processors, each having a data interface and a monitoring interface; b. a data store common to all said processors, each of said processors having access to said data store; c. a plurality of data highways, each data highway being connected to a respective processor; d. a plurality of input/output channels connected to said data highways, each of said processors thereby having access to any one of said channels over its respective data highway; e. a plurality of fault channels each of which is associated with a respective one of said processors, each fault channel being connected on one hand to the monitoring interface of its associated processor and on the other hand to the data highway of at least one other processor; f. and an interrupt unit connected to each of said processors and being responsive to a request for service from any one of said processors to select another of said processors to attend to that request; g. each of said processors including fault detection means for detecting faults occurring in that processor and for causing the associated processor, on occurrence of such a fault, to exclude itself from normal operation, to open its associated fault channel, and to apply a request for service to said interrupt unit.
Claim 2
Dependent Claim
220 words
A Multiprocessor computer system comprising: a. a plurality of independent data processors, each having a data interface and a monitoring interface; b. a data store common to all said processors, each of said processors having access to said data store; c. a plurality of data highways, each data highway being connected to a respective processor; d. a plurality of input/output channels connected to said data highways, each of said processors thereby having access to any one of said channels over its respective data highway; e. a plurality of fault channels each of which is associated with a respective one of said processors, each fault channel being connected on one hand to the monitoring interface of its associated processor and on the other hand to the data highway of at least one other processor; f. and an interrupt unit connected to each of said processors and being responsive to a request for service from any one of said processors to select another of said processors to attend to that request; g. each of said processors including fault detection means for detecting faults occurring in that processor and for causing the associated processor, on occurrence of such a fault, to exclude itself from normal operation, to open its associated fault channel, and to apply a request for service to said interrupt unit.
Claim 3
Dependent Claim
62 words
A system according to claim 1, wherein each said fault channel includes means providing access to the associated processor when that associated processor requests service from another processor selected by said interrupt unit, each processor including means for subjecting, when so selected by said interrupt unit, a requesting processor to predetermined tests in order to diagnose the condition of the requesting processor.
Claim 4
Dependent Claim
48 words
A system according to claim 2, including a check program for running on the requesting processor under the control of the servicing processor, the servicing processor including means for monitoring the execution of each instruction, one at a time, for determining whether that instruction has been correctly executed.
Claim 5
Dependent Claim
64 words
A system according to claim 3, wherein, in the event of an instruction of said check program being incorrectly executed, the servicing processor includes means controlling the operation of the requesting processor to make it perform that instruction again, one microprogram transfer at a time, and means for monitoring the execution of each said transfer to determine whether that transfer has been correctly executed.
Claim 6
Dependent Claim
80 words
A system according to claim 1 wherein each said processor has a console comprising a plurality of controls and a display, the console being connected to the monitoring interface of the processor when the associated fault channel is closed, so as to permit operation of that processor to be monitored manually from said console; and each said fault channel comprises means for disconnecting the console controls from the monitoring interface of its associated processor when the fault channel is opened.
Claim 7
Dependent Claim
73 words
A system according to claim 1 wherein the monitoring interface of each processor carries data from a plurality of registers inside the processor, and each fault channel comprises multiplexing means for selecting data from any one of the registers in the associated processor in response to an instruction received from another said processor over its data highway; and means for transmitting the selected data back over the data highway of said other processor.
Claim 8
Dependent Claim
61 words
A system according to claim 6 wherein the data in each of said registers consists of a plurality of data bits and a parity check bit, and said means for transmitting selected data back over a data highway further includes means for transmitting this selected data along with further information to indicate whether or not the selected data is parity correct.
Claim 9
Dependent Claim
97 words
A system according to claim 1 wherein each of said input/output channels and said fault channels connected to a given one of said data highways has a unique address allocated to it, and each of said channels is provided with a decode logic circuit for recognising its own address when that address is applied to the data highway by the relevant processor, each of said channels including means responsive to said decode logic circuit to enable the channel so as to permit transfer of data between the channel and the data highway when said address is recognised.
Claim 10
Dependent Claim
89 words
A system according to claim 1 wherein each said processor further includes a timing means for timing a predetermined time-out period, said time-out period being started whenever the associated fault channel is opened, and being restarted when access is made to the processor over the fault channel by another processor, expiration of said time-out period causing the fault channel to be closed again and causing the processor to run a self-testing program, whereupon, if said self-testing program, is correctly completed, the processor is allowed to return to normal operation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-04-07 | 1978-10-07 | 1979-04-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-04-07 | 1982-10-07 | 1983-04-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-04-07 | 1986-10-07 | 1987-04-08 | $7700.00 | Window Closed / Lapsed |