Digital system forming a frequency multiplex system

Claim 2

A digital system for forming a frequency multiplex group from n incoming channels, operated at a sampling frequency Fs, comprising analog-digital conversion means receiving said n incoming channels and furnishing digital values x2(t) at the output thereof, first multiplication means for multiplying said digital values x2(t) by alternate digital values of cos 2 pi F1t and sin 2 pi F1t and furnishing signals x3(t) and x3(t) in quadrature, operating at the frequency 2n Fs, digital filtering means for receiving in common said values x3(t) and x3(t) and furnishing digital values x4(t) and x4(t) in quadrature, second multiplication means operating at the frequency 2n Fs and receiving in common said quadrature values x4(t) and x4(t) for multiplying said values alternately by digital values of cos 2 pi fkt and sin 2 pi fkt, wherein k varies from 1 to n, addition means operating at the frequency n Fs and receiving output signals x5(t) and x5(t) in quadrature from said second multiplication means for furnishing signals x6(t), a digitalanalog converter connected to the output of said addition means, and an analog band-pass filter having a bandwidth of 60 - 108 kHz connected to the output of said digital-analog converter.

Claim 3

A system according to claim 1, characterized in that said digital filtering means is associated with an input logic circuit operating as a buffer memory for the alternate application of said values x3(t) and x3(t) in quadrature to said filtering means, and with an output logic circuit operating as a buffer memory for the alternate extraction of the two series of products in quadrature from said filtering means.

Claim 4

A system according to claim 2, characterized in that said second multiplication means is associated with an input logic circuit operating as a buffer memory for the alternate application of said values x4(t) and x4(t) in quadrature to said second multiplication means, said addition means being connected to said second multiplication means by means of a direct connection by means of a single logic circuit operating as a buffer memory.

Claim 5

A system according to claim 1, further including means for repeatinG n times the same value of cos 2 pi F1ti and n times the same value of sin 2 pi F1ti at the input of said first multiplication means.

Claim 6

A system according to claim 4, further including means for selectively changing said sampling frequency Fs connected to the input of said analog-digital conversion means.

Claim 7

A digital system for forming a frequency multiplex group from two non-synchronized PCM frames, comprising first and second system groups connected to said PCM frames, respectively, said first and second system groups terminating in common at a single band-pass filter, each system group comprising means for changing the sampling frequency of the system, analog-digital conversion means receiving said n incoming channels and furnishing digital values x2(t) at the output thereof, first multiplication means for multiplying said digital values x2(t) by alternate digital values of cos 2 pi F1t and sin 2 pi F1t and furnishing signals x3(t) and x3(t) in quadrature, operating at the frequency 2n Fs, digital filtering means for receiving in common said values x3(t) and x3(t) and furnishing digital values x4(t) and x4(t) in quadrature, second multiplication means operating at the frequency 2n Fs and receiving in common said quadrature values x4(t) and x4(t) for multiplying said values alternately by digital values of cos 2 pi fkt and sin 2 pi fkt, wherein k varies from 1 to n, addition means operating at the frequency n Fs and receiving output signals x5(t) and x5(t) in quadrature from said second multiplication means for furnishing signals x6(t), and a digital-analog converter connected to the output of said addition means.

Claim 8

A digital system for forming a frequency multiplex group from two non-synchronized PCM frames, comprising first and second system groups connected to said PCM frames, respectively, said first and second system groups terminating in common at a single band-pass filter, each system group comprising means for changing the sampling frequency of the system, analog-digital conversion means receiving said n incoming channels and furnishing digital values x2(t) at the output thereof, first multiplication means for multiplying said digital values x2(t) by alternate digital values of cos 2 pi F1t and sin 2 pi F1t and furnishing signals x3(t) and x3(t) in quadrature, operating at the frequency 2n Fs, digital filtering means for receiving in common said values x3(t) and x3(t) and furnishing digital values x4(t) and x4(t) in quadrature, second multiplication means operating at the frequency 2n Fs and receiving in common said quadrature values x4(t) and x4(t) for multiplying said values alternately by digital values of cos 2 pi fkt and sin 2 pi fkt, wherein k varies from 1 to n, addition means operating at the frequency n Fs and receiving output signals x5(t) and x5(t) in quadrature from said second multiplication means for furnishing signals x6(t), and a digital-analog converter connected to the output of said addition means.

Claim 9

A system according to claim 6, characterized in that said digital filtering means is associated with an input logic circuit operating as a buffer memory for the alternate application of said values x3(t) and x3(t) in quadrature to said filtering means, and with an output logic circuit operating as a buffer memory for the alternate extraction of the two series of products in quadrature from said filtering means.

Claim 10

A system according to claim 7, characterized in that said second multiplication means is associated with an input logic circuit operating as a buffer memory for the alternate application of said values x4(t) and x4(t) in quadrature to said second multiplication means, said addition means being connected to said second multiplication means by means of a direct connection by means of a single logic circuit operating as a buffer memory.

Claim 11

A system according to claim 6, further including means for repeating n times the same value of cos 2 pi F1ti and n times the same value of sin 2 pi F1ti at the input of said first multiplication means.