US3872476A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Fruit reduction by probe selection
Assignee: United States Department of the Navy
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Filing: 1973-11-23
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Granted: 1975-03-18
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Expires: 1993-11-23
Abstract
Abstract In an interrogator-transponder collision avoidance system a probe selector detects the presence of two distinct signals, P or Q. Detection of a P signal at the input dictates a Q output and vice versa. Additional circuitry resolves ambiguity when P and Q appear concomitantly. In the absence of either P or Q at the input, the output is randomly chosen to be either P or Q.
Inventors
- 👤 Oscar Shames
- 👤 James L Hinds
- 👤 Michael G Raditz
- 👤 Gerald J Palatucci
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 16:12
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/88; G01S13/93; G01S13/933; G01S13/74; G01S13/79
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
317 words
A probe selector comprising: clock means for producing periodic signals; counter means responsive to a START signal for counting said periodic signals and for producing at least three counting interval signals T1, T2 and T3; gate generator means responsive to said START signal and to said signal T2 for producing a gate signal of predetermined duration; first means responsive to a P probe and to said gate signal for producing a signal P1; second means responsive to a Q probe and to said gate signal for producing a signal Q1; first memory means responsive to said P1 signal or to said Q1 signal for storing said signals and for generating a choose-Q signal when said P1 signal is stored and for generating a choose-P signal when said Q1 signal is stored; second memory means responsive to said P1 signal or to said Q1 signal for registering the occurrence of said P1 signal or said Q1 signal and for producing a probe-received signal upon such occurrence, said second memory means being also responsive to said counting interval signal T3 and arranged to register the occurrence of said signal T3 and to produce a NO-probe-received signal upon registration of said signal T3; first gate means responsive to said probe received signal and to said signal T1 for producing a signal X; second gate means responsive to said signal X and to said signal choose-Q for producing a signal Y; third gate means responsive to said signal X and to said signal choose-P for producing a signal Z; probe selector means for producing a signal Q'' and a signal P'' on a mutually exclusive and random basis; fourth gate means responsive to said Q'', to said NO-probereceived signal, and to said signal T1 for producing a signal A; fifth gate means responsive to said signal P'', to said NO-probereceived signal, and to said signal T1 for producing a signal B.
Claim 2
Dependent Claim
317 words
A probe selector comprising: clock means for producing periodic signals; counter means responsive to a START signal for counting said periodic signals and for producing at least three counting interval signals T1, T2 and T3; gate generator means responsive to said START signal and to said signal T2 for producing a gate signal of predetermined duration; first means responsive to a P probe and to said gate signal for producing a signal P1; second means responsive to a Q probe and to said gate signal for producing a signal Q1; first memory means responsive to said P1 signal or to said Q1 signal for storing said signals and for generating a choose-Q signal when said P1 signal is stored and for generating a choose-P signal when said Q1 signal is stored; second memory means responsive to said P1 signal or to said Q1 signal for registering the occurrence of said P1 signal or said Q1 signal and for producing a probe-received signal upon such occurrence, said second memory means being also responsive to said counting interval signal T3 and arranged to register the occurrence of said signal T3 and to produce a NO-probe-received signal upon registration of said signal T3; first gate means responsive to said probe received signal and to said signal T1 for producing a signal X; second gate means responsive to said signal X and to said signal choose-Q for producing a signal Y; third gate means responsive to said signal X and to said signal choose-P for producing a signal Z; probe selector means for producing a signal Q'' and a signal P'' on a mutually exclusive and random basis; fourth gate means responsive to said Q'', to said NO-probereceived signal, and to said signal T1 for producing a signal A; fifth gate means responsive to said signal P'', to said NO-probereceived signal, and to said signal T1 for producing a signal B.
Claim 3
Dependent Claim
71 words
The combination according to claim 1 further including: a P0 probe oscillator; a Q0 probe oscillator; sixth gate means responsive to said signal Y or to said signal A and to the output of said Q0 probe oscillator for producing a signal Q0; and seventh gate means responsive to said signal Z or to said signal B and to the output of said P0 probe oscillator for producing a signal P0.
Claim 4
Dependent Claim
47 words
The combination according to claim 1 wherein said counter means includes: a digital counter; a flip-flop set by said START signal and reset by said signal T3; and gate means responsive to the set output of said flip-flop for gating said periodic signal to said digital counter.
Claim 5
Dependent Claim
309 words
A probe selector comprising: counter means responsive to a start signal and a periodic signal for counting said periodic signal and for producing a first timing interval signal T1, a second timing interval signal T2, and a third timing interval signal T3; gate generator means responsive to said START signal and to said signal T2 for producing a gate signal of predetermined duration; first means responsive to a P probe and to said gate signal for producing a signal P1; second meAns responsive to a Q probe and to said gate signal for producing a signal Q1; probe memory means responsive to said signal P1 and to said signal Q1 for registering the occurrence of said signals and for producing a choose-Q signal when the signal P1 is registered and for producing a choose-P signal when the signal Q1 is registered; probe record means responsive to said signal P1 or to said signal Q1 for recording said signals and for producing a probe-received signal, said probe record means being further responsive to said signal T3 for recording said signal T3 and for producing a no-probe-received signal; probe selector means responsive to said signal T1 for producing a signal Q'' and a signal P'' on a mutually exclusive and random basis; first gate means responsive to said probe-received signal and to said signal T1 for producing a signal X; second gate means responsive to said signal X and to said signal choose-Q for producing a signal Y; third gate means responsive to said signal X and to said signal choose-P for producing a signal Z; fourth gate means responsive to said signal Q'', to said no-probe-received signal, and to said signal T1 for producing a signal A; and fifth gate means responsive to said signal P'', to said no-probe-received signal, and to said signal T1 for producing a signal B.
Claim 6
Dependent Claim
309 words
A probe selector comprising: counter means responsive to a start signal and a periodic signal for counting said periodic signal and for producing a first timing interval signal T1, a second timing interval signal T2, and a third timing interval signal T3; gate generator means responsive to said START signal and to said signal T2 for producing a gate signal of predetermined duration; first means responsive to a P probe and to said gate signal for producing a signal P1; second meAns responsive to a Q probe and to said gate signal for producing a signal Q1; probe memory means responsive to said signal P1 and to said signal Q1 for registering the occurrence of said signals and for producing a choose-Q signal when the signal P1 is registered and for producing a choose-P signal when the signal Q1 is registered; probe record means responsive to said signal P1 or to said signal Q1 for recording said signals and for producing a probe-received signal, said probe record means being further responsive to said signal T3 for recording said signal T3 and for producing a no-probe-received signal; probe selector means responsive to said signal T1 for producing a signal Q'' and a signal P'' on a mutually exclusive and random basis; first gate means responsive to said probe-received signal and to said signal T1 for producing a signal X; second gate means responsive to said signal X and to said signal choose-Q for producing a signal Y; third gate means responsive to said signal X and to said signal choose-P for producing a signal Z; fourth gate means responsive to said signal Q'', to said no-probe-received signal, and to said signal T1 for producing a signal A; and fifth gate means responsive to said signal P'', to said no-probe-received signal, and to said signal T1 for producing a signal B.
Claim 7
Dependent Claim
71 words
The combination according to claim 4 and further including: a P0 probe oscillator; a Q0 oscillator; sixth gate means responsive to said signal Y or to said signal A and to the output of said Q0 probe oscillator for producing a signal Q0; and seventh gate means responsive to said signal Z or to said signal B and to the output of said P0 probe oscillator for producing a signal P0.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-03-17 | 1978-09-16 | 1979-03-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-03-17 | 1982-09-16 | 1983-03-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-03-17 | 1986-09-16 | 1987-03-18 | $7700.00 | Window Closed / Lapsed |