DV/DT circuit for use in D.C. link converters

Claim 2

A circuit for controlling the rate of change (dv/dt) of forward blocking voltage reapplied across a silicon controlled rectifier to prevent the silicon controlled rectifier from conducting after the silicon controlled rectifier is turned off, comprising a resonant inductance-capacitance network including a series connected capacitor and diode connected in parallel with the silicon controlled rectifier and an inductance connected in series with the silicon controlled rectifier, the diode being poled to conduct in the same direction as the silicon controlled rectifier, the network having a time constant to inSure a rate of change (dv/dt) of voltage reapplied across the silicon controlled rectifier to prevent the silicon controlled rectifier from conducting after the silicon controlled rectifier is turned off.

Claim 3

A circuit as described in claim 1 in which the inductance capacitance network includes means for discharging the energy stored in the inductance as a result of capacitor currents.

Claim 4

A circuit as described in claim 2 in which the discharging means are diodes connected in series with the inductors.

Claim 5

A circuit having a pair of silicon controlled rectifiers alternately turned on by logic signals applied to the gates of the silicon controlled rectifiers and alternately turned off by applying reverse polarity voltages across the silicon controlled rectifiers, the circuit including a resonant inductance capacitance network connnected to each silicon controlled rectifier and having a time constant to insure a rate of change (dv/dt) of forward blocking voltage reapplied across the silicon controlled rectifiers to prevent the silicon controlled rectifiers from conducting after the silicon controlled rectifiers are turned off, each said network including a series connected capacitor and diode connected in parallel with the associated silicon controlled rectifier and an inductance connected in series with the silicon controlled rectifier, the diode being poled to conduct in the same direction as the silicon controlled rectifier.

Claim 6

A circuit having a pair of silicon controlled rectifiers alternately turned on by logic signals applied to the gates of the silicon controlled rectifiers and alternately turned off by applying reverse polarity voltages across the silicon controlled rectifiers, the circuit including a resonant inductance capacitance network connnected to each silicon controlled rectifier and having a time constant to insure a rate of change (dv/dt) of forward blocking voltage reapplied across the silicon controlled rectifiers to prevent the silicon controlled rectifiers from conducting after the silicon controlled rectifiers are turned off, each said network including a series connected capacitor and diode connected in parallel with the associated silicon controlled rectifier and an inductance connected in series with the silicon controlled rectifier, the diode being poled to conduct in the same direction as the silicon controlled rectifier.

Claim 7

A circuit as described in claim 4 in which the capacitors are alternately charged and discharged when the silicon controlled rectifiers are alternately turned off.

Claim 8

A circuit as described in claim 5 in which one capacitor charges while the other capacitor discharges.

Claim 9

A circuit as described in claim 4 in which the inductance capacitance network includes means for discharging the energy stored in the inductance as a result of capacitor currents.

Claim 10

A current as described in claim 7 in which the discharging means are diodes connected in series with the inductors.