US3870906A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Ramp/hold circuit
Assignee: United States Department of the Navy
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Filing: 1973-06-21
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Granted: 1975-03-11
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Expires: 1993-06-21
Abstract
Abstract A ramp/hold circuit (pulse width to pulse amplitude converter) having a constant current source driving a differential amplifier, and a current steering means for diverting the current source output from one side to the other of the amplifier. The input pulse determines the charge on a storage capacitor, which capacitor provides the circuit output. A discharge path for the capacitor is not provided until a gate signal is applied to a gating circuit.
Inventors
- 👤 Richard Smith Hughes
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 11:48
CPC Classifications
H; H03; H03K; H03K11/00; H03K4/00; H03K4/06; H03K4/08; H03K4/48; H03K4/50
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
229 words
An electronic circuit for converting a signal pulse width into a voltage amplitude, comprising: a differential amplifier including first and second transistors having commonly connected emitters, wherein each transistor provides a current path through said amplifier; an input coupled to the base of said first transistor for receiving said pulse signal, wherein the current path through said amplifier is responsive to said signal; a current source coupled to said commonly connected emitters providing a constant value of electrical current to said amplifier, including a third transistor, and an operational amplifier having its output directly connected to the base of said third transistor, wherein the collector of said third transistor is connected to said commonly connected emitters, its emitter and one input of said operational amplifier are coupled in common to a d.c. voltage source, and the operational amplifiers other input is coupled to a controllable reference voltage source; charge storing means coupled to the collector of said second transistor for storing an electrical charge that is dimensionally associated with the signal pulse width received by said input; and discharging means coupleD to said charge storing means for selectively providing a discharge path for said storing means; wherein the current path of the current from said constant current source is through said second transistor to said charge storing means during the period said pulse signal is received by said input.
Claim 2
Dependent Claim
229 words
An electronic circuit for converting a signal pulse width into a voltage amplitude, comprising: a differential amplifier including first and second transistors having commonly connected emitters, wherein each transistor provides a current path through said amplifier; an input coupled to the base of said first transistor for receiving said pulse signal, wherein the current path through said amplifier is responsive to said signal; a current source coupled to said commonly connected emitters providing a constant value of electrical current to said amplifier, including a third transistor, and an operational amplifier having its output directly connected to the base of said third transistor, wherein the collector of said third transistor is connected to said commonly connected emitters, its emitter and one input of said operational amplifier are coupled in common to a d.c. voltage source, and the operational amplifiers other input is coupled to a controllable reference voltage source; charge storing means coupled to the collector of said second transistor for storing an electrical charge that is dimensionally associated with the signal pulse width received by said input; and discharging means coupleD to said charge storing means for selectively providing a discharge path for said storing means; wherein the current path of the current from said constant current source is through said second transistor to said charge storing means during the period said pulse signal is received by said input.
Claim 3
Dependent Claim
229 words
An electronic circuit for converting a signal pulse width into a voltage amplitude, comprising: a differential amplifier including first and second transistors having commonly connected emitters, wherein each transistor provides a current path through said amplifier; an input coupled to the base of said first transistor for receiving said pulse signal, wherein the current path through said amplifier is responsive to said signal; a current source coupled to said commonly connected emitters providing a constant value of electrical current to said amplifier, including a third transistor, and an operational amplifier having its output directly connected to the base of said third transistor, wherein the collector of said third transistor is connected to said commonly connected emitters, its emitter and one input of said operational amplifier are coupled in common to a d.c. voltage source, and the operational amplifiers other input is coupled to a controllable reference voltage source; charge storing means coupled to the collector of said second transistor for storing an electrical charge that is dimensionally associated with the signal pulse width received by said input; and discharging means coupleD to said charge storing means for selectively providing a discharge path for said storing means; wherein the current path of the current from said constant current source is through said second transistor to said charge storing means during the period said pulse signal is received by said input.
Claim 4
Dependent Claim
229 words
An electronic circuit for converting a signal pulse width into a voltage amplitude, comprising: a differential amplifier including first and second transistors having commonly connected emitters, wherein each transistor provides a current path through said amplifier; an input coupled to the base of said first transistor for receiving said pulse signal, wherein the current path through said amplifier is responsive to said signal; a current source coupled to said commonly connected emitters providing a constant value of electrical current to said amplifier, including a third transistor, and an operational amplifier having its output directly connected to the base of said third transistor, wherein the collector of said third transistor is connected to said commonly connected emitters, its emitter and one input of said operational amplifier are coupled in common to a d.c. voltage source, and the operational amplifiers other input is coupled to a controllable reference voltage source; charge storing means coupled to the collector of said second transistor for storing an electrical charge that is dimensionally associated with the signal pulse width received by said input; and discharging means coupleD to said charge storing means for selectively providing a discharge path for said storing means; wherein the current path of the current from said constant current source is through said second transistor to said charge storing means during the period said pulse signal is received by said input.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-03-10 | 1978-09-09 | 1979-03-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-03-10 | 1982-09-09 | 1983-03-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-03-10 | 1986-09-09 | 1987-03-11 | $7700.00 | Window Closed / Lapsed |