Semiconductor component and its method of manufacturing

Claim 1

A method of manufacturing a semiconductor component wherein an electrically conductive field plane layer is manufactured concentrically, in a self-aligning manner on an insulating intermediate layer of a semiconductor body comprising: producing a first layer of silicon oxide over a portion of a polished end-type silicon wafer; depositing an oxidation masking layer over said silicon oxide layer, said masking layer extending beyond said silicon oxide layer; thermally oxidizing the exposed surface area of said silicon wafer; etching away the thermally oxidized area leaving a mesa-shaped projection beneath said silicon oxide layer; depositing an insulating layer having a window therein on the exposed surface area of said silicon wafer; depositing a doped polycrystalline silicon layer over the exposed surface area of said component, said polycrystalline layer having a thickness substantially equal to the height of said mesa-shaped projection; producing a second layer of silicon oxide on the surface of said polycrystalline layer; producing a window in said second layer concentrically over said mesa-shaped projection, said window having a smaller diameter than said projection; etching through the window in said second layer to the surface of said oxidation masking layer; removing said oxidation masking layer; etching away said second layer, said first layer and that portion of said doped polycrystalline silicon layer lying above said projection and extending outwardly from the space previously occupied by said oxidation masking layer; depositing a gate oxide layer over the entire surface area of said component; applying a second coating of polycrystalline silicon over said gate oxide layer; forming an oxide film over said second coating; oxide etching said second coating and said gate oxide layer leaving said gate oxide layer and a gate electrode concentrically over said projection and defining a desired conductor pattern over said polycrystalline layer; diffusing source and drain regions into the surface of said projection; depositing an oxide coating over the surface area of said component; etching contact windows over said source and drain regions and said defined conductor pattern; and applying conductors to said source and drain regions and said conductor pattern.

Claim 2

A method of manufacturing a semiconductor component wherein an electrically conductive field plane layer is manufactured concentrically, in a self-aligning manner on an insulating intermediate layer of a semiconductor body comprising: producing a first layer of silicon oxide over a portion of a polished end-type silicon wafer; depositing an oxidation masking layer over said silicon oxide layer, said masking layer extending beyond said silicon oxide layer; thermally oxidizing the exposed surface area of said silicon wafer; etching away the thermally oxidized area leaving a mesa-shaped projection beneath said silicon oxide layer; depositing an insulating layer having a window therein on the exposed surface area of said silicon wafer; depositing a doped polycrystalline silicon layer over the exposed surface area of said component, said polycrystalline layer having a thickness substantially equal to the height of said mesa-shaped projection; producing a second layer of silicon oxide on the surface of said polycrystalline layer; producing a window in said second layer concentrically over said mesa-shaped projection, said window having a smaller diameter than said projection; etching through the window in said second layer to the surface of said oxidation masking layer; removing said oxidation masking layer; etching away said second layer, said first layer and that portion of said doped polycrystalline silicon layer lying above said projection and extending outwardly from the space previously occupied by said oxidation masking layer; depositing a gate oxide layer over the entire surface area of said component; applying a second coating of polycrystalline silicon over said gate oxide layer; forming an oxide film over said second coating; oxide etching said second coating and said gate oxide layer leaving said gate oxide layer and a gate electrode concentrically over said projection and defining a desired conductor pattern over said polycrystalline layer; diffusing source and drain regions into the surface of said projection; depositing an oxide coating over the surface area of said component; etching contact windows over said source and drain regions and said defined conductor pattern; and applying conductors to said source and drain regions and said conductor pattern.

Claim 3

A METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT WHEREIN AN ELECTRICALLY CONDUCTIVE FIELD PLANE LAYER IS MANUFACTURED CONCENTRICALLY, IN A SELF-ALIGNING MANNER ON AN INSULATING INTERMEDIATE LAYER OF A SEMICONDUCTOR BODY COMPRISING: PRODUCING A FIRST LAYER OF SILICON OXIDE OVER A PORTION OF A POLISHED END-TYPE SLICON WAFER; DEPOSITING AN OXIDATION MASKING LAYER OVER SAID SILICON OXIDE LAYER, SAID MASKING LAYER EXTENDING BEYOND SAID SILICON OXIDE LAYER; THERMALLY OXIDIZING THE EXPOSED SURFACE AREA OF SAID SILICON WAFER; ETCHING AWAY THE THERMALLY OXIDEIZED AREA LEAVING A MESASHAPED PROHECTION BENEATH SAID SILICON OXIDE LAYER; DEPOSITING AN INSULATING LAYER HAVING A WINDOW THEREIN ON THE EXPOSED SURFACE OF SAID SILICON WAFER; DEPOSITING A DOPED POLYCRYSTALLINE SILICON LAYER OVER THE EXPOSED SURFACE AREA OF SAID COMPONENT, SAID POLYCRYSTALLINE LAYER HAVING A THICKNESS SUBSTANTIALLY EQUAL TO THE HEIGHT OF SAID MESA-SHAPED PROJECTION; PRODUCING A SECOND LAYER OF SILICON OXIDE ON THE SURFACE OF SAID POLYCRYSTALLINE LAYER; PRODUCING A WINDOW IN SAD SECOND LAYER CONCENTRICALLY OVER SAID MESA-SHAPED PROJECTION, SAID WINDOW HAVING A SMALLER DIAMETER THAN SAID PROJECTION; ETCHING THROUGH THE WINDOW IN SAID SECOND LAYER TO THE SURFACE OF SAID OXIDATION MASKING LAYER; REMOVING SAID OCIDATION MASKING LAYER; ETCHING AWAY SAID SECOND LAYER, SAID FIRST LAYER AND THAT PORTION OF SAID DOPED POLYCRYSTALLINE SILICON LAYER LYING ABOVE SAID PROJECTION AND EXTENDING OUTWARDLY FROM THE SPACE PREVIOUSLY OCCUPIED BY SAID OXIDATION MASKING LAYER; DEPOSITING A GATE OXIDE LAYER OVER THE ENTIRE SURFACE AREA OF SAID COMPONENT; APPLYING A SECOND COATING OF POLYCRYSTALLINE SILICON OVER SAID GATE OXIDE LAYER; FORMING AN OXIDE FILM OVER SAID SECOND COATING; OXIDE ETCHING SAID SECOND COATING AND SAID GATE OXIDE LAYER LEAVING SAID GATE OXIDE LAYER AND A GATE ELECTRODE CONCENTRICALLY OVER SAID PROJECTION AND DEFINING A DESIRED CONDUCTOR PATTERN OVER SAID POLYCRYSTALLINE LAYER; DIFFUSING SOURCE AND DRAIN REGIONS INTO THE SURFACE OF SAID PROJECTION; DEPOSITING AN OXIDE COATING OVER THE SURFACE AREA OF SAID COMPONENT; ETCHING CONTACT WINDOWS OVER SAID SOURCE AND DRAIN REGIONS AND SAID DEFINED CONDUCTOR PATTERN; AND APPLYING CONDUCTORS TO SAID SOURCE AND DRAIN REGIONS AND SAID CONDUCTOR PATTERN.

Claim 4

A METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT WHEREIN AN ELECTRICALLY CONDUCTIVE FIELD PLANE LAYER IS MANUFACTURED CONCENTRICALLY, IN A SELF-ALIGNING MANNER ON AN INSULATING INTERMEDIATE LAYER OF A SEMICONDUCTOR BODY COMPRISING: PRODUCING A FIRST LAYER OF SILICON OXIDE OVER A PORTION OF A POLISHED END-TYPE SLICON WAFER; DEPOSITING AN OXIDATION MASKING LAYER OVER SAID SILICON OXIDE LAYER, SAID MASKING LAYER EXTENDING BEYOND SAID SILICON OXIDE LAYER; THERMALLY OXIDIZING THE EXPOSED SURFACE AREA OF SAID SILICON WAFER; ETCHING AWAY THE THERMALLY OXIDEIZED AREA LEAVING A MESASHAPED PROHECTION BENEATH SAID SILICON OXIDE LAYER; DEPOSITING AN INSULATING LAYER HAVING A WINDOW THEREIN ON THE EXPOSED SURFACE OF SAID SILICON WAFER; DEPOSITING A DOPED POLYCRYSTALLINE SILICON LAYER OVER THE EXPOSED SURFACE AREA OF SAID COMPONENT, SAID POLYCRYSTALLINE LAYER HAVING A THICKNESS SUBSTANTIALLY EQUAL TO THE HEIGHT OF SAID MESA-SHAPED PROJECTION; PRODUCING A SECOND LAYER OF SILICON OXIDE ON THE SURFACE OF SAID POLYCRYSTALLINE LAYER; PRODUCING A WINDOW IN SAD SECOND LAYER CONCENTRICALLY OVER SAID MESA-SHAPED PROJECTION, SAID WINDOW HAVING A SMALLER DIAMETER THAN SAID PROJECTION; ETCHING THROUGH THE WINDOW IN SAID SECOND LAYER TO THE SURFACE OF SAID OXIDATION MASKING LAYER; REMOVING SAID OCIDATION MASKING LAYER; ETCHING AWAY SAID SECOND LAYER, SAID FIRST LAYER AND THAT PORTION OF SAID DOPED POLYCRYSTALLINE SILICON LAYER LYING ABOVE SAID PROJECTION AND EXTENDING OUTWARDLY FROM THE SPACE PREVIOUSLY OCCUPIED BY SAID OXIDATION MASKING LAYER; DEPOSITING A GATE OXIDE LAYER OVER THE ENTIRE SURFACE AREA OF SAID COMPONENT; APPLYING A SECOND COATING OF POLYCRYSTALLINE SILICON OVER SAID GATE OXIDE LAYER; FORMING AN OXIDE FILM OVER SAID SECOND COATING; OXIDE ETCHING SAID SECOND COATING AND SAID GATE OXIDE LAYER LEAVING SAID GATE OXIDE LAYER AND A GATE ELECTRODE CONCENTRICALLY OVER SAID PROJECTION AND DEFINING A DESIRED CONDUCTOR PATTERN OVER SAID POLYCRYSTALLINE LAYER; DIFFUSING SOURCE AND DRAIN REGIONS INTO THE SURFACE OF SAID PROJECTION; DEPOSITING AN OXIDE COATING OVER THE SURFACE AREA OF SAID COMPONENT; ETCHING CONTACT WINDOWS OVER SAID SOURCE AND DRAIN REGIONS AND SAID DEFINED CONDUCTOR PATTERN; AND APPLYING CONDUCTORS TO SAID SOURCE AND DRAIN REGIONS AND SAID CONDUCTOR PATTERN.

Claim 14

A method of manufacturing a semiconductor component wherein an electrically conductive field plane layer is manufactured concentrically, in a self-aligning manner on an insulating intermediate layer of a semiconductor body comprising: depositing a silicon nitride masking layer over a portion of a polished end-type silicon wafer; thermally oxidizing the exposed surface area of said silicon wafer; etching away a thermally oxidized area leaving a mesa-shaped projection beneath said silicon nitride layer; depositing an insulating layer having a window therein on the exposed surface area of silicon wafer; evaporating a layer of metal on said insulating layer; depositing a doped polycrystalline silicon layer over the exposed surface area of said component, said polycrystalline layer having a thickness substantially equal to the height of said mesa-shaped projection; producing a first layer of silicon oxide on the surface of said polycrystalline layer; producing a window in said first layer concentrically over said mesa-shaped projection, said window having a smaller diameter than said projection; etching through the window in said first layer to the surface of said metal masking layer; etching away said metal layer; etching away said first layer, and that portion of said doped polycrystalline silicon layer lying above said projection and extending outwardly from the space previously occupied by said metal layer; depositing a gate oxide layer over the entire surface area of said component; applying a second coating of polycrystalline silicon over said gate oxide layer; forming an oxide film over said second coating; oxide etching said second coating and said gate oxide layer leaving said gate oxide layer and a gate electrode concentrically over said projection and defining a desired conductor pattern over said doped polycrystalline layer; diffusing source and drain regions into the surface of said projection; depositing an oxide coating over the surface area of said component; etching contact windows over said source and drain regions and said defined conductor pattern; and applying conductors to said source and drain regions and said conductor pattern.

Claim 15

A method of manufacturing a semiconductor component wherein an electrically conductive field plane layer is manufactured concentrically, in a self-aligning manner on an insulating intermediate layer of a semiconductor body comprising: depositing a silicon nitride masking layer over a portion of a polished end-type silicon wafer; thermally oxidizing the exposed surface area of said silicon wafer; etching away a thermally oxidized area leaving a mesa-shaped projection beneath said silicon nitride layer; depositing an insulating layer having a window therein on the exposed surface area of silicon wafer; evaporating a layer of metal on said insulating layer; depositing a doped polycrystalline silicon layer over the exposed surface area of said component, said polycrystalline layer having a thickness substantially equal to the height of said mesa-shaped projection; producing a first layer of silicon oxide on the surface of said polycrystalline layer; producing a window in said first layer concentrically over said mesa-shaped projection, said window having a smaller diameter than said projection; etching through the window in said first layer to the surface of said metal masking layer; etching away said metal layer; etching away said first layer, and that portion of said doped polycrystalline silicon layer lying above said projection and extending outwardly from the space previously occupied by said metal layer; depositing a gate oxide layer over the entire surface area of said component; applying a second coating of polycrystalline silicon over said gate oxide layer; forming an oxide film over said second coating; oxide etching said second coating and said gate oxide layer leaving said gate oxide layer and a gate electrode concentrically over said projection and defining a desired conductor pattern over said doped polycrystalline layer; diffusing source and drain regions into the surface of said projection; depositing an oxide coating over the surface area of said component; etching contact windows over said source and drain regions and said defined conductor pattern; and applying conductors to said source and drain regions and said conductor pattern.