Memory device with standby memory elements

Claim 1

In combination with a computer which has a memory having memory elements for storing words wherein each word is a coded combination of bits in bit positional index order and each word is stored in an addressable word group of the memory elements, each memory element storing a particular positional bit of a word, a word register for receiving a word from an addressed word group of the memory or transferring a word to an addressed word group of the memory, a word address register for receiving the address of the word group, a source of word addresses, a transfer means for transferring word addresses from the source of word addresses to the word address register, and a control unit for controlling the transfer means, and the control unit including means for transmitting control signals to the memory for indicating the direction of transfer of a word between the word register and the word group indicated by the contents of the word address register, standby memory apparatus comprising a plurality of input channel means and a plurality of output channel means, means for connecting each of said input and output channel means between a bit position of the word register and a corresponding bit position element of an addressed word group, at least one standby memory element for at least some of the word groups of the memory, a plurality of controllable writing gate means each having a control input, an information input connected to one of said input channel means and an information output connected to said standby memory element of an addressed word group, each of said controllable writing gate means connecting its information input to Its information output upon receipt of a control signal at its control input, a plurality of reversing switch means, each of said reversing switch means being interposed in one of said output channels, each of said reversing switch means having a first information bit input connected to receive a particular positional bit from an addressed word group, a second information bit input for receiving the bit stored in the standby memory element of the addressed word group, an information bit output connected to the associated bit position of the word register, and a reversing control input means for receiving a control signal, each of said reversing switch means including means operative in the absence of such control signal at said reversing control input means for connecting said first information bit input to said information bit output and in the presence of such control signal for connecting said second information bit input to said information bit output, a bit index storage means for transmitting a control signal to the associated control input of the controllable writing gate means and the associated control input means of the reversing switch means in accordance with the bit position stored therein, and said control unit including means for transferring to said bit index storage means a representation of the desired bit position.