Signal correlator with improved dynamic range

Claim 2

The signal correlation process with improved dynamic range for providing an indication of the time average of the product of two arbitrary signals, which process utilizes an electronic multiplier whose output signal will include DC drift and offset due to circuit imperfections in said multiplier comprising the steps of: prior to multiplying said signals in said multiplier, multiplying one of said signals with a predetermined polarity reversing signal to provide said one signal repetitively reversed in polarity in accordance with the sign of said predetermined polarity reversing signal; multiplying said one signal repetitively reversed in polarity times the other of said signals in said multiplier to provide the product of said signals in the form of a predetermined product signal repetitively polarity reversed in accordance with the sign of said predetermined polarity reversing signal, the output signal from said multiplier comprised of said predetermined product signal and said DC drift and offset and wherein the peak-to-peak amplitude of said predetermined product signal is proportional substantially only to the actual product of said signals and is substantially independent of said DC drift and offset; synchronously filtering said output signal of said electronic multiplier in synchronism with said predetermined polarity reversing signal to attenuate said DC drift and offset thereby to provide an AC output signal; and synchronously rectifying said AC output signal in synchronism with said predetermined polarity reversing signal to provide a DC signal which is said indication of the time average of the product of said two arbitrary signals.

Claim 3

The process according to claim 1 wherein said repetitive polarity reversal of said one signal is done aperiodically.

Claim 4

The process according to claim 1 wherein said repetitive polarity reversal of said one signal is done periodically.

Claim 5

The process according to claim 3 wherein said predetermined polarity reversing signal is a square wave signal and wherein said predetermined product signal is a square wave signal.

Claim 6

The process according to claim 4 wherein said square wave signals are symmetrical square wave signals.

Claim 7

The process according to claim 1 wherein said synchronous filtering of said output signal of said electronic multiplier comprises the steps of: applying said output signal of said electronic multiplier to the input of a rotating capacitor square wave signal filter including a rotating capacitor C connected between terminals T1 and T2 and an electrically associated resistor R; and repetitively reversing the connection of said capacitor C to said terminals T1 and T2 in synchronism with the polarity reversal of said predetermined product signal whereby, upon the RC time constant of said resistor R and said capacitor C being much greater than the period of said predetermined product signal, substantially only said predetermined product signal being provided at the output of said rotating capacitor square wave signal filter.

Claim 8

The process according to claim 6 wherein said rotating capacitor square wave filter includes said resistor R connected in series with said capacitor C and wherein said output signal of said electronic multiplier is a voltage signal and is applied across the series connection of said resistor R and said capacitor C.

Claim 9

The process according to claim 6 wherein said rotating capacitor square wave filter includes said resistor R connected in parallel with said capacitor C and wherein said output signal of said electronic multiplier is a current signal and is applied across the parallel connection of said resistor R and said capacitor C.

Claim 10

The process according to claim 6 wherein said rotating capacitor square wave filter includes an operational amplifier connected as an inverting summing amplifier and wherein said capacitor C and resistor R are connected in parallel in the feedback network of said inverting summing amplifier and wherein said output signal of said electronic multiplier is applied to the input of said inverting summing amplifier and wherein said AC output signal appears at the output of said inverting summing amplifier.

Claim 11

The process according to claim 1 wherein said synchronous rectification is accomplished by feeding said AC output signal and a predetermined signal in phase with and at the same frequency of said predetermined product signal into a switching type phase reversing multiplier wherein said signals are multiplied and whereby the output signal of said switching type phase reversing multiplier is said DC signal.

Claim 12

The process according to claim 1 including the additional step of amplifying said AC output signal subsequent to said synchronous filtering and prior to said synchronous rectification.

Claim 13

The process according to claim 1 including the additional step of passing said AC output signal through a high pass filter to further remove any DC and low frequency signals included in said AC output signal, said additional step being accomplished subsequent to said synchronous filtering and prior to said synchronous rectification.

Claim 14

The process according to claim 1 including the additional steps of amplifying said AC output signal and passing said amplified AC output signal through a high pass filter to further remove any DC and low frequency signals included in said AC output signal, said additional steps being accomplished subsequent to said synchronous filtering and prior to said synchronous rectification.

Claim 15

The process according to claim 1 wherein said multiplication of said one signal repetitively reversed in polarity times the other is accomplished by phase reversal modulation and wherein one of said arbitrary signals assumes only the values of +1 or -1 and wherein said one arbitrary signal is the arbitrary signal which is multiplied with said predetermined polarity reversing signal.

Claim 16

The process according to claim 1 wherein said multiplication of said one signal repetitively reversed in polarity times the other is accomplished by phase reversal modulation and wherein one of said arbitrary signals assumes only the values +1 or -1 and wherein the other of said arbitrary signals is the arbitrary signal which is multiplied with said polarity reversing signal.

Claim 17

The signal correlation process with improved dynamic range for providing an indication proportional to the exponentially weighted time average of characteristic time T of the product of two arbitrary signals A and B, i.e. <A X B>T which process utilizes an electronic multiplier whose output signal will include DC drift and offset due to circuit imperfections in the electronic multiplier, comprising the steps of: multiplying signal B with a predetermined square wave signal of frequency fi to provide signal B repetitively reversed in polarity in accordance with the sign of said predetermined square wave signal; multiplying signal B repetitively reversed in polarity times arbitrary signal A in said electronic multiplier to provide the product of said signals in the form of a predetermined square wave product signal repetitively reversed in polarity in accordance with the sign of said predetermined square wave signal in phase therewith and at the frequency thereof fi, the output signal of said electronic multiplier compriSed of said predetermined square wave product signal and said DC drift and offset and wherein the peak-to-peak amplitude of said predetermined square wave product signal is proportional only to the actual product of said signals A and B and is substantially independent of said DC drift and offset; synchronously filtering said output signal of said electronic multiplier in synchronism with said predetermined polarity reversing signal to attenuate said DC drift and offset and provide an AC output signal by: i. applying said output signal of said electronic multiplier to a rotating capacitor square wave filter including a capacitor C and an electrically associated resistor R, said capacitor C being connected between terminals T1 and T2, and ii. repetitively reversing the connection of said capacitor C to said terminals T1 and T2 in phase with and at the frequency fi of said predetermined square wave signal whereby, upon the RC time constant of said resistor R and capacitor C being much greater than the period of said predetermined square wave product signal, said AC output signal comprising substantially only said predetermined square wave product signal is provided at the output of said rotating capacitor square wave filter; and synchronously rectifying said filtered predetermined square wave product signal in phase with and at the frequency fi of said predetermined square wave signal to provide a DC signal which is said indication proportional to the exponentially weighted time average of the product of arbitrary signals A and B with characteristic time T where T equals the RC time constant of said rotating capacitor C and said electrically associated resistor R.

Claim 18

The signal correlation process with improved dynamic range for providing an indication proportional to the exponentially weighted time average of characteristic time T of the product of two arbitrary signals A and B, i.e. <A X B>T which process utilizes an electronic multiplier whose output signal will include DC drift and offset due to circuit imperfections in the electronic multiplier, comprising the steps of: multiplying signal B with a predetermined square wave signal of frequency fi to provide signal B repetitively reversed in polarity in accordance with the sign of said predetermined square wave signal; multiplying signal B repetitively reversed in polarity times arbitrary signal A in said electronic multiplier to provide the product of said signals in the form of a predetermined square wave product signal repetitively reversed in polarity in accordance with the sign of said predetermined square wave signal in phase therewith and at the frequency thereof fi, the output signal of said electronic multiplier compriSed of said predetermined square wave product signal and said DC drift and offset and wherein the peak-to-peak amplitude of said predetermined square wave product signal is proportional only to the actual product of said signals A and B and is substantially independent of said DC drift and offset; synchronously filtering said output signal of said electronic multiplier in synchronism with said predetermined polarity reversing signal to attenuate said DC drift and offset and provide an AC output signal by: i. applying said output signal of said electronic multiplier to a rotating capacitor square wave filter including a capacitor C and an electrically associated resistor R, said capacitor C being connected between terminals T1 and T2, and ii. repetitively reversing the connection of said capacitor C to said terminals T1 and T2 in phase with and at the frequency fi of said predetermined square wave signal whereby, upon the RC time constant of said resistor R and capacitor C being much greater than the period of said predetermined square wave product signal, said AC output signal comprising substantially only said predetermined square wave product signal is provided at the output of said rotating capacitor square wave filter; and synchronously rectifying said filtered predetermined square wave product signal in phase with and at the frequency fi of said predetermined square wave signal to provide a DC signal which is said indication proportional to the exponentially weighted time average of the product of arbitrary signals A and B with characteristic time T where T equals the RC time constant of said rotating capacitor C and said electrically associated resistor R.

Claim 19

The process according to claim 16 wherein said repetitive polarity reversal of said signal B is done aperiodically.

Claim 20

The process according to claim 16 wherein said repetitive polarity reversal of said signal B is done periodically.

Claim 21

The process according to claim 16 wherein said predetermined square wave signal and said predetermined square wave product signal are symmetrical square wave signals.

Claim 22

The process according to claim 16 wherein said rotating capacitor square wave filter includes said resistor R connected in series with said capacitor C and wherein said output signal of said electronic multiplier is a voltage signal and is applied across the series connection of said resistor R and said capacitor C.

Claim 23

The process according to claim 16 wherein said rotating capacitor square wave filter includes said resistor R connected in parallel with said capacitor C and wherein said output signal of said electronic multiplier is a current signal and is applied across the parallel connection of said resistor R and said capacitor C.

Claim 24

The process according to claim 16 wherein said rotating capacitor square wave filter includes an operational amplifier connected as an inverting summing amplifier and wherein said capacitor C and resistor R are connected in parallel in the feedback network of said inverting summing amplifier and wherein said output signal of said electronic multiplier is applied to the input of said inverting summing amplifier and wherein substantially only said predetermined square wave product signal appears at the output of said inverting summing amplifier.

Claim 25

The process according to claim 16 wherein said synchronous rectification is accomplished by feeding said AC output signal and a second predetermined square wave signal in phase with and at the same frequency fi of said predetermined square wave product signal into a switching type phase reversing multiplier wherein said signals are multiplied and whereby the output signal of said switching type hase reversing is said DC signal.

Claim 26

The process according to claim 16 including the additional step of amplifying said AC output signal subsequent to said synchronous filtering and prior to said synchronous rectiFication.

Claim 27

The process according to claim 16 including the additional step of passing said AC output signal through a high pass filter to further remove any DC and low frequency signals included in said AC output signal, said additional step being accomplished subsequent to said synchronous filtering and prior to said synchronous rectification.

Claim 28

The process according to claim 16 including the additional steps of amplifying said AC output signal and passing said amplified AC output signal through a high pass filter to further remove any DC and low frequency signal included in said AC output signal, said additional steps being accomplished subsequent to said synchronous filtering and prior to said synchronous rectification.

Claim 29

The process according to claim 16 wherein said multiplication of said signal B repetitively reversed in polarity times arbitrary signal A is accomplished by phase-reversal modulation and wherein arbitrary signal B assumes only the values +1 or -1.

Claim 30

The process according to claim 16 wherein said multiplication of said signal B repetitively reversed in polarity times arbitrary signal A is accomplished by phase-reversal modulationand wherein arbitrary signal A assumes only the values +1 or -1.

Claim 31

Signal correlator apparatus with improved dynamic range for providing an indication of the time average of the product of two arbitrary signals, which apparatus utilizes an electronic multiplier whose output signal will include DC drift and offset due to circuit imperfections in said multiplier, comprising: additional multiplier means for multiplying one of said signals with a predetermined polarity reversing signal to provide said one signal repetitively reversed in polarity in accordance with the sign of said predetermined polarity reversing signal, said electronic multiplier for multiplying said one signal repetitively reversed in polarity times the other of said signals to provide the product of said signals in the form of a predetermined product signal repetitively polarity reversed in accordance with the sign of said predetermined polarity reversing signal, the output signal from said electronic multiplier comprised of said predetermined product signal and said DC drift and offset and wherein the peak-to-peak amplitude of said predetermined product signal is proportional substantially only to the actual product of said signals and is substantially independent of said DC drift and offset; synchronous filter means for filtering said output signal of said electronic multiplier in synchronism with said predetermined polarity reversing signal to attenuate said DC drift and offset thereby to provide an AC output signal; and means for synchronously rectifying said AC output signal in synchronism with said predetermined polarity reversing signal to provide a DC signal which is said indication of the time average of the product of said two arbitrary signals.

Claim 32

Signal correlator apparatus with improved dynamic range for providing an indication of the time average of the product of two arbitrary signals, which apparatus utilizes an electronic multiplier whose output signal will include DC drift and offset due to circuit imperfections in said multiplier, comprising: additional multiplier means for multiplying one of said signals with a predetermined polarity reversing signal to provide said one signal repetitively reversed in polarity in accordance with the sign of said predetermined polarity reversing signal, said electronic multiplier for multiplying said one signal repetitively reversed in polarity times the other of said signals to provide the product of said signals in the form of a predetermined product signal repetitively polarity reversed in accordance with the sign of said predetermined polarity reversing signal, the output signal from said electronic multiplier comprised of said predetermined product signal and said DC drift and offset and wherein the peak-to-peak amplitude of said predetermined product signal is proportional substantially only to the actual product of said signals and is substantially independent of said DC drift and offset; synchronous filter means for filtering said output signal of said electronic multiplier in synchronism with said predetermined polarity reversing signal to attenuate said DC drift and offset thereby to provide an AC output signal; and means for synchronously rectifying said AC output signal in synchronism with said predetermined polarity reversing signal to provide a DC signal which is said indication of the time average of the product of said two arbitrary signals.

Claim 33

Apparatus according to claim 29 wherein said additional multiplier means are multiplier means for providing said one signal repetitively reversed in polarity aperiodically.

Claim 34

Apparatus according to claim 29 wherein said additional multiplier means includes an electronic multiplier.

Claim 35

Apparatus according to claim 31 wherein said electronic multiplier is a switching type phase reversing modulator.

Claim 36

Apparatus according to claim 31 wherein said electronic multiplier is a logic multiplier.

Claim 37

Apparatus according to claim 33 wherein said logic multiplier is an exclusive-or circuit.

Claim 38

Apparatus according to claim 31 wherein said additional multiplier means further includes means for generating a square wave signal which square wave signal is said predetermined polarity reversing signal.

Claim 39

Apparatus according to claim 35 wherein said means for generating said square wave signal are means for generating a symmetrical square wave signal.

Claim 40

Apparatus according to claim 29 wherEin said synchronous filter means for filtering said output signal of said electronic multiplier comprises: a rotating capacitor square wave filter including a rotating capacitor C, connected between terminals T1 and T2, and an electrically associated resistor R, said rotating capacitor square wave filter having an input for receiving said output signal of said electronic multiplier; and means for repetitively reversing the connection of said capacitor C to said terminals T1 and T2 in snychronism with the polarity reversal of said predetermined product signal whereby, upon said output signal of said electronic multiplier being applied to said input and upon the RC time constant of said resistor R and said capacitor C being much greater than the period of said predetermined product signal, substantially only said predetermined product signal is provided at the output of said rotating capacitor square wave filter.

Claim 41

Apparatus according to claim 37 wherein said rotating capacitor square wave filter includes said resistor R connected in series with said capacitor C and wherein said output signal of said electronic multiplier is a voltage signal and is applied across the series connection of said resistor R and said capacitor C.

Claim 42

Apparatus according to claim 37 wherein said rotating capacitor square wave filter includes said resistor R connected in parallel with said capacitor C and wherein said output signal of said electronic multiplier is a current signal and is applied across the parallel connection of said resistor R and said capacitor C.

Claim 43

Apparatus according to claim 37 wherein said rotating capacitor square wave filter includes an operational amplifier connected as an inverting summing amplifier and wherein said capacitor C and resistor R are connected in parallel in the feedback network of said inverting summing amplifier and wherein said output signal of said electronic multiplier is applied to the input of said inverting summing amplifier and wherein substantially only said predetermined product signal appears at the output of said inverting summing amplifier.

Claim 44

Apparatus according to claim 29 wherein said synchronous rectifying means includes a signal generator for providing a predetermined square wave signal in phase with and at the same frequency of said predetermined product signal and a switching type phase reversing multiplier for receiving said AC output signal and said predetermined square wave signal and for multiplying said signals and for providing said DC signal.

Claim 45

Apparatus according to claim 29 further including amplifying means connected intermediate said synchronous filtering means and said synchronous rectifying means and for amplifying said AC output signal.

Claim 46

Apparatus according to claim 29 further including a high pass filter connected intermediate said synchronous filtering means and said synchronous rectifying means and for further filtering said AC output signal by further removing any DC and low frequency signals included in said AC output signal.

Claim 47

Apparatus according to claim 29 further including amplifying means and a high pass filter connected intermediate said synchronous filtering means and said synchronous rectifying means and for amplifying and further filtering said AC output signal to further remove any DC and low frequency signals included in said AC output signal.

Claim 48

Signal correlator apparatus with improved dynamic range for providing an indication proportional to the exponentially weighted time average of characteristic time T of the product of two arbitrary signals A and B, i.e. <A X B>T which apparatus utilizes an electronic multiplier whose output signal will include DC drift and offset due to circuit imperfections in the electronic multiplier, comprising: additional multiplier means for multiplying signal B with a predetermined square wave signal of frequency fi to provide signal B repetitIvely reversed in polarity in accordance with the sign of said predetermined square wave signal; said electronic multiplier for multiplying signal B repetitively reversed in polarity times arbitrary signal A to provide the product of said signals in the form of a predetermined square wave product signal repetitively reversed in polarity in accordance with the sign of said predetermined square wave signal in phase therewith and at the frequency thereof fi, the output signal of said electronic multiplier comprised of said predetermined square wave product signal and said DC drift and offset and wherein the peak-to-peak amplitude of said predetermined square wave product signal is proportional only to the actual product of said signals A and B and is substantially independent of said DC drift and offset; synchronous filter means for filtering said output signal of said electronic multiplier in synchronism with said predetermined polarity reversing signal to attenuate said DC drift and offset, thereby to provide an AC output signal, said synchronous filter means including: i. a rotating capacitor square wave filter including a capacitor C and an electrically associated resistor R, said capacitor C being connected between terminals T1 and T2, and ii. means for repetitively reversing the connection of said capacitor C to said terminals T1 and T2 in phase with and at the frequency fi of said predetermined square wave signal whereby, upon the RC time constant of said resistor R and capacitor C being much greater than the period of said predetermined square wave product signal, said AC output signal comprising substantially only said predetermined square wave product signal is provided at the output of said rotating capacitor square wave filter; and means for synchronously rectifying said AC output signal in phase with and at the frequency fi of said predetermined square wave signal to provide a DC signal which is said indication proportional to the exponentially weighted time average of the product of arbitrary signals A and B with characteristic time T, where T equals the RC time constant of said rotating capacitor C and said electrically associated resistor R.

Claim 49

Signal correlator apparatus with improved dynamic range for providing an indication proportional to the exponentially weighted time average of characteristic time T of the product of two arbitrary signals A and B, i.e. <A X B>T which apparatus utilizes an electronic multiplier whose output signal will include DC drift and offset due to circuit imperfections in the electronic multiplier, comprising: additional multiplier means for multiplying signal B with a predetermined square wave signal of frequency fi to provide signal B repetitIvely reversed in polarity in accordance with the sign of said predetermined square wave signal; said electronic multiplier for multiplying signal B repetitively reversed in polarity times arbitrary signal A to provide the product of said signals in the form of a predetermined square wave product signal repetitively reversed in polarity in accordance with the sign of said predetermined square wave signal in phase therewith and at the frequency thereof fi, the output signal of said electronic multiplier comprised of said predetermined square wave product signal and said DC drift and offset and wherein the peak-to-peak amplitude of said predetermined square wave product signal is proportional only to the actual product of said signals A and B and is substantially independent of said DC drift and offset; synchronous filter means for filtering said output signal of said electronic multiplier in synchronism with said predetermined polarity reversing signal to attenuate said DC drift and offset, thereby to provide an AC output signal, said synchronous filter means including: i. a rotating capacitor square wave filter including a capacitor C and an electrically associated resistor R, said capacitor C being connected between terminals T1 and T2, and ii. means for repetitively reversing the connection of said capacitor C to said terminals T1 and T2 in phase with and at the frequency fi of said predetermined square wave signal whereby, upon the RC time constant of said resistor R and capacitor C being much greater than the period of said predetermined square wave product signal, said AC output signal comprising substantially only said predetermined square wave product signal is provided at the output of said rotating capacitor square wave filter; and means for synchronously rectifying said AC output signal in phase with and at the frequency fi of said predetermined square wave signal to provide a DC signal which is said indication proportional to the exponentially weighted time average of the product of arbitrary signals A and B with characteristic time T, where T equals the RC time constant of said rotating capacitor C and said electrically associated resistor R.

Claim 50

Apparatus according to claim 45 wherein said additional multiplier means are multiplier means for providing said signal B repetitively reversed in polarity aperiodically.

Claim 51

Apparatus according to claim 45 wherein said additional multiplier means include an electronic multiplier.

Claim 52

Apparatus according to claim 47 wherein said electronic multiplier is a switching type phase reversing modulator.

Claim 53

Apparatus according to claim 47 wherein said electronic multiplier is a logic multiplier.

Claim 54

Apparatus according to claim 49 wherein said logic multiplier is an exclusive-or circuit.

Claim 55

Apparatus according to claim 47 wherein said additional multiplier means further include a square wave generator for generating said predetermined square wave signal of frequency fi.

Claim 56

Apparatus according to claim 51 wherein said square wave generator is for generating a symmetrical square wave signal.

Claim 57

Apparatus according to claim 45 wherein said rotating capacitor square wave filter includes said resistor R connected in series with said capacitor C and wherein said output signal of said electronic multiplier is a voltage signal and is applied across the series connection of said resistor R and said capacitor C.

Claim 58

Apparatus according to claim 45 wherein said rotating capacitor square wave filter includes said resistor R connected in parallel with said capacitor C and wherein said output signal of said electronic multiplier is a current signal and is applied across the parallel connection of said resistor R and said capacitor C.

Claim 59

Apparatus according to claim 45 wherein said rotating capacitor square wave filter includes an operational amplifier connected as an inverting summing amplifier and wherein said capacitor C and resistor R are connected in parallel in the feedback network of said inverting summing amplifier and wherein said output signal of said electronic multiplier is applied to the input of said inverting summing amplifier and wherein substantially only said predetermined square wave product signal appears at the output of said inverting summing amplifier.

Claim 60

Apparatus according to claim 45 wherein said synchronous rectifying means include a square wave signal generator for providing a second predetermined square wave signal in phase with and at the same frequency fi of said predetermined square wave product signal and a switching type phase reversing multiplier for receiving said AC output signal and said second predetermined square wave signal and for multiplying said signals and for providing said DC signal.

Claim 61

Apparatus according to claim 45 further including amplifying means connected intermediate said synchronous filtering means and said synchronous rectifying means and for amplifying said AC output signal.

Claim 62

Apparatus according to claim 45 further including a high pass filter connected intermediate said synchronous filtering means and said synchronous rectifying means and for further filtering said AC output signal by further removing any DC and low frequency signals included in said AC output signal.

Claim 63

Apparatus according to claim 45 further including amplifying means and a high pass filter connected intermediate said synchronous filtering means and said synchronous rectifying means and for amplifying and further filtering said AC output signal to further remove any DC and low frequency signals included in said AC output signal.

Claim 64

Apparatus according to claim 45 wherein said electronic multiplier is a linear multiplier.

Claim 65

Apparatus according to claim 45 wherein said electronic multiplier is a switching type phase reversing modulator.