US3867203A
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Method for producing semiconductor devices
Assignee: Licentia Patent Verwaltungs GmbH
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Filing: 1973-06-25
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Granted: 1975-02-18
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Expires: 1993-06-25
Abstract
Abstract Semiconductor devices are produced by simultaneously diffusing into a semiconductor body of two doping substances, one of which produces therein p-type conductivity and the other substance produces n-type conductivity, these substances having different diffusion speeds in said body and different permeabilities in masking layers, one of said doping substances also serving to inhibit diffusion of the other doping substance in the semiconductor body. This provides for close control of the depth and concentration of the doped layers and the resulting semiconductor devices are particularly adopted for preparation of high-frequency components in a subsequent gold-diffusion step.
Inventors
- 👤 Horst Gesing
- 👤 Rigobert Schimmer
- 👤 Manfred Streit
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 08:21
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/101; H10D84/131; H10D84/135; H10D84/136; H10D62/00; H10D62/80; H10D62/83; H10D62/834; H10P; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/151; Y10S252/00; Y10S252/95; Y10S252/951
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
129 words
A METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE COMPRISING THE STEPS OF: PROVIDING A WAFER OF SEMICONDUCTOR MATERIAL; PROVIDING FIRST AND SECOND DIFFUSIBLE DOPING SUBSTANCES WHICH HAVE DIFFERENT DIFFUSION SPEEDS AND WHICH PRODUCE ONE CONDUCTIVITY TYPE AND THE OPPOSITE CONDUCTIVITY TYPE, RESPECTIVETY, AND WITH SAID SECOND DOPING SUBSTANCE BEING A SUBSTANCE WHICH INHIBITS THE DIFFUSION OF SAID FIRST DOPING SUBSTANCE INTO THE MATERIAL OF SAID WAFER; APPLYING A MASKING LAYER WHICH HAS A DIFFERENT PERMEABILITY FOR EACH OF SAID FIRST AND SECOND DIFFUSIBLE DOPING SUBSTANCES OF A PORTION OF THE SURFACE OF SAID WAFER; SIMULTANEOUSLY FORMING A REGION OF ONLY SAID ONE CONDUCTIVIITY TYPE BENEATH SAID MASKING LAYER AND A REGION OF ONLY SAID OPPOSITE CONDUCTIVITY BENEATH THE UNMASKED PORTION OF THE SURFACE OF SAID WAFER BY EXPOSING SAID MASKED
Claim 2
Independent Claim
129 words
A METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE COMPRISING THE STEPS OF: PROVIDING A WAFER OF SEMICONDUCTOR MATERIAL; PROVIDING FIRST AND SECOND DIFFUSIBLE DOPING SUBSTANCES WHICH HAVE DIFFERENT DIFFUSION SPEEDS AND WHICH PRODUCE ONE CONDUCTIVITY TYPE AND THE OPPOSITE CONDUCTIVITY TYPE, RESPECTIVETY, AND WITH SAID SECOND DOPING SUBSTANCE BEING A SUBSTANCE WHICH INHIBITS THE DIFFUSION OF SAID FIRST DOPING SUBSTANCE INTO THE MATERIAL OF SAID WAFER; APPLYING A MASKING LAYER WHICH HAS A DIFFERENT PERMEABILITY FOR EACH OF SAID FIRST AND SECOND DIFFUSIBLE DOPING SUBSTANCES OF A PORTION OF THE SURFACE OF SAID WAFER; SIMULTANEOUSLY FORMING A REGION OF ONLY SAID ONE CONDUCTIVIITY TYPE BENEATH SAID MASKING LAYER AND A REGION OF ONLY SAID OPPOSITE CONDUCTIVITY BENEATH THE UNMASKED PORTION OF THE SURFACE OF SAID WAFER BY EXPOSING SAID MASKED
Claim 3
Dependent Claim
15 words
A method as defined in claim 1 wherein the semiconductor wafer is composed of silicon.
Claim 4
Dependent Claim
18 words
A method as defined in claim 2 wherein the first and second doping substances are gallium and phosphorus.
Claim 5
Dependent Claim
22 words
A method as defined in claim 3 wherein said first and second doping substances are provided in the form of gallium phosphide.
Claim 6
Dependent Claim
14 words
A method as defined in claim 4 wherein the masking layer is silicon oxide.
Claim 7
Dependent Claim
34 words
A method as defined in claim 2 wherein the masking layer is silicon dioxide and wherein said second diffusible doping substance is simultaneously used as a masking layer for said first diffusible doping substance.
Claim 8
Dependent Claim
29 words
A method as defined in claim 6 wherein said first and second diffusible doping substances are gallium and phosphorus respectively and wherein the masking substance for gallium is phosphorus.
Claim 9
Dependent Claim
47 words
A method as defined in claim 7 wherein said step of applying a masking layer includes: oxidizing the surface of the silicon wafer to form a silicon oxide layer; and removing at least a portion of the silicon oxide layer from one side of the oxidized wafer.
Claim 10
Dependent Claim
35 words
A method as defined in claim 8 wherein all of the silicon oxide layer is removed from one side of the oxidiZed wafer and a diode structure is produced therefrom in a single diffusion step.
Claim 11
Dependent Claim
45 words
A method as defined in claim 9 wherein the oxide layer is removed by etching with hydrofluoric acid or a solution thereof, and the diffusion step is conducted in a quartz ampule for a period of about 30 hours at a temperature of about 1,250*C.
Claim 12
Dependent Claim
92 words
A method as defined in claim 9 wherein: said semiconductor wafer is initially of one conductivity type, a portion of the silicon oxide layer is removed from said one side of the oxidized wafer, and the thus-prepared wafer is subjected to a first simultaneous diffusion of said first and second diffusible doping substances; and further comprising: following said first diffusion, removing a selected portion of the silicon oxide from the opposite side of the wafer and subjecting the wafer to a second diffusion with the doping substances used for the first diffusion.
Claim 13
Dependent Claim
28 words
A method as defined in claim 11 wherein the first diffusion takes place for a period of about 8 to 15 hours at a temperature of about 1,250*C.
Claim 14
Dependent Claim
25 words
A method as defined in claim 12 wherein the first diffusion takes place during a period of 12 hours at a temperature of about 1,250*C.
Claim 15
Dependent Claim
28 words
A method as defined in claim 12 wherein the second diffusion takes place during a period of about 8 to 15 hours at a temperature of about 1,250*C.
Claim 16
Dependent Claim
25 words
A method as defined in claim 14 wherein the second diffusion takes place during a period of 13 hours at a temperature of about 1,250*C.
Claim 17
Dependent Claim
26 words
A method as defined in claim 12 wherein excessive deviations from predetermined standards following the first diffusion step are compensated for during the second diffusion step.
Claim 18
Dependent Claim
35 words
A method as defined in claim 12 wherein the portions of the silicon dioxide layers removed are so selected that a thyristor with an integrated diode is produced by the first and second diffusion steps.
Claim 19
Dependent Claim
28 words
A method as defined in claim 12 further comprising diffusing gold into the semiconductor wafer in a third diffusion step thereby producing a component suitable for higher frequencies.
Claim 20
Dependent Claim
27 words
A method as defined in claim 18 wherein the gold for the gold diffusion is precipitated from a solution containing hydrofluoric acid directly upon the semiconductor device.
Claim 21
Dependent Claim
36 words
A method as defined in claim 19 wherein the gold is precipitated from a solution containing 1.5 normal hydrofluoric acid and approximately 1 X 10 8 to 1 X 10 3 percent by weight of gold.
Claim 22
Dependent Claim
35 words
A method as defined in claim 20 wherein the gold for the gold diffusion is precipitated from a solution containing 1.5 normal hydrofluoric acid and approximately 1 X 10 4 percent by weight of gold.
Claim 23
Dependent Claim
27 words
A method as defined in claim 19 wherein the gold diffusion is effected for a period of approximately 1 hour at a temperature of 800* to 950*C.
Claim 24
Dependent Claim
27 words
A method as defined in claim 22 wherein the gold diffusion is effected for a period of approximately 1 hour at a temperature of 860* to 890*C.
Claim 25
Dependent Claim
27 words
A method as defined in claim 23 wherein the gold diffusion takes place during a period of approximately 1 hour at a temperature of 870* to 875*C.
Claim 26
Dependent Claim
42 words
A method as defined in claim 22 wherein for a charge of wafers which have been subjected to a first and a second dopant diffusion, the gold diffusion temperature is corrected by way of test with a few wafers of said charge.
References Cited (Backward Citations)
US3109760A
Cited
US3484313A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-02-17 | 1978-08-19 | 1979-02-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-02-17 | 1982-08-19 | 1983-02-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-02-17 | 1986-08-19 | 1987-02-18 | $7700.00 | Window Closed / Lapsed |