Apparatus for detecting and elminating a transfer of noise records to a data processing apparatus

Claim 2

Apparatus for detecting and eliminating a transfer of noise records to a data processing system received from a data source as units of information, said apparatus being coupled to said data source and to said system, said apparatus comprising: buffer memory means having a plurality of addressable storage locations, said buffer memory means coupled to receive signals representative of units of information from said source and transfer only signals corresponding to units of information to said system; addressing means coupled to said buffer memory means, said addressing means being operative to condition said buffer memory means to select an initial storage location and successive locations within said buffer memory means for storing units of information when received from said data source; noise detection means coupled to said addressing means, said detection means in response to signals accumulated from said data source indicating that a minimum number of said units of information corresponds to a predetermined minimum number has been stored in said buffer memory means being operative to generate a signal for conditioning said addressing means so as to enable read out of said units of information; and, control means coupled to said noise detection means and to said addressing means, said control means being conditioned by said noise detection means in the absence of receiving signals from said data source for a predetermined period of time to force said addressing means to condition said buffer memory means to select again said initial storage location for storage of new signals subsequently received from said source.

Claim 3

The apparatus of claim 1 wherein said addressing means includes: input counter means coupled to said buffer memory means for storing address signals specifying a storage location into which an unit of information received from said source is to be stored; and, output counter means coupled to said buffer means for storing address signals specifying a storage location from which a stored unit of information is to be read out to said system; and said control means conditioned by said signal from said noise detection means to generate a control signal to apply address signals from said output counter to condition said buffer memory means for read out of said units of information.

Claim 4

The apparatus of claim 2 wherein said control means includes: comparator gating means coupled to said input and output counter means, said comparator gating means being operative to produce an output signal upon detecting a difference in value between said address signals of said output counter means and said input counter means corResponding to a predetermined number; and, output means coupled to said noise detection means and to said comparator gating means, said output means being conditioned by said noise detection means to generate said control signal only in the presence of said output signal thereby enabling said read out only when said buffer storage means stores a plurality of units of information corresponding to said predetermined number.

Claim 5

The apparatus of claim 3 wherein said control means includes means coupled to said system and to said output means, said means being operative in response to said control signal to apply a cycle request signal to said system for transferring an unit of information from said buffer storage means to said system.

Claim 6

The apparatus of claim 1 wherein said noise detection means includes: first gating means connected to receive a format signal indicating a formatting of said units of information being received from said data source and at least one of said signals indicative of a first predetermined number, said first gating means being operative to produce a first output signal indicating storage of a minimum size record for at least one formatting of said units of information, second gating means connected to receive said signals indicative of a second predetermined number, said second gating means being operative to produce a second output signal indicating storage of a minimum size record for a different formatting of said units of information; and bistable means coupled to said first and second gating means, said bistable means in response to either said first or second output signals being operative to switch from a first to a second state signaling that said units stored constitute a data record; said control means being conditioned by said bistable means when in said first and second states respectively to enable and inhibit the forcing of said addressing means to select again said initial storage location.

Claim 7

The apparatus of claim 5 wherein said noise detection means further includes: selection means having first and second inputs and an output coupled to said bistable means, said first input being connected to receive a first signal indicating that a first criterion is selected for establishing said minimum size record and said second input being connected to receive a signal indicating that a second criterion is selected for establishing said minimum size record, said selection means being connected to condition said bistable means to be switched to said second state only in response to said accumulated signals indicating that a selected one of said criteria has been met.

Claim 8

The apparatus of claim 5 wherein said selection means when arranged to select said first criterion is operative to condition said bistable means to switch to said second state in response to said first and second output signals indicating that said buffer storage means stores a number of units of information corresponding to the minimum size record for a record having units of information arranged in either 1 X 1 or 2 X 1 format and in a 4 X 3 format respectively and wherein said selection means when arranged to select said second criterion is operative to condition said bistable means to switch to said second state in response to accumulated signals indicating that said buffer storage means stores a number of units of information corresponding to a programmed established a larger minimum size record.

Claim 9

The apparatus of claim 7 wherein said noise detection means further includes minimum record bistable means, said bistable means being connected to said addressing means and to said first and second gating means for receiving signals representative of the number of units of information stored in said buffer memory means, said minimum record bistable means being connected to said selection means and being operative to switch from a first to a second state generating said signal indicating that said number corresponds to Said programmed established minimum size record.

Claim 10

The apparatus of claim 8 wherein said control further includes: frame counter means coupled to said system and to said second gating means, said frame counter means being operative to be set to a predetermined state at an indicated start of transferring units of information constituting a first record, said frame counting means being connected to be incremented in accordance with the number of said units of information received from said system; and, bistable means connected to said frame counter and to said first and second gating means, said bistable means being conditioned to be set to a predetermined state when said frame counter means has advanced to said first predetermined count and said bistable means is in said predetermined state conditioning said first and second gating means to generate said first and second output signals in accordance with said format signals and signals from said frame counter means.

Claim 11

The apparatus of claim 1 wherein said control means includes: record detection control circuit means being connected to receive signals representative of said units of information from said data source, said record detection control circuit means being operative to generate a control signal upon detecting said absence in receiving signals from said source for said predetermined period of time; and, clear control means connected to said noise detection means and to said record detection control circuit means, said clear control means being conditioned by said control signal in the absence of said signal from said noise detection means to generate a clear signal for switching said noise detection means and said record detection control circuit means to initial states and for conditioning said buffer memory means to select again said initial storage location.

Claim 12

The apparatus of claim 10 wherein said control means further includes end of record control means connected to said record detection control circuit means and to said clear control means, said end of record control means including bistable storage means, said bistable storage being operative in response to said control signal and said signal from said noise detection means to switch to a predetermined state enabling signaling termination of said transfer to said data source and conditioning of said clear control means to generate said clear signal.

Claim 13

In a data processing system, peripheral controller apparatus for transferring to an interface of central processing unit signals read by a magnetic tape device from a magnetic tape in response to request signals generated by cycle means included in said peripheral controller apparatus, said peripheral controller apparatus further including detection means for detecting noise signals constituting noise records read from said magnetic tape as units of information of an actual data record and eliminating a transfer of said noise records to said central processing unit, said detection means comprising: input register means coupled to said magnetic tape device for receiving said noise and data signals transferred to said peripheral controller apparatus as said units of information; buffer memory means coupled to input register means and to said central processing unit interface, said buffer storage means having a plurality of addressable storage locations; addressing means coupled to said buffer storage means, said addressing means being operative to condition said buffer memory means to select an initial storage location and successive locations within said buffer memory means for storing said units of information received from said input register storage means; noise record detection means coupled to said addressing means, said detection means in response to signals accumulated from said data source indicating that a predetermined minimum number of said units of information has been transferred and stored in said buffer storage means being operative to geneRate a signal for conditioning said addressing means so as to enable read out of said units of information; and, control means coupled to said noise detection means and to said addressing means, said control means being conditioned by said noise detection means in the absence of said signal and transfer of units of information from said device for a predetermined period of time to force said addressing means to condition said buffer memory means to select again said initial storage location for storing new signals transferred from said input register means.

Claim 14

In a data processing system, peripheral controller apparatus for transferring to an interface of central processing unit signals read by a magnetic tape device from a magnetic tape in response to request signals generated by cycle means included in said peripheral controller apparatus, said peripheral controller apparatus further including detection means for detecting noise signals constituting noise records read from said magnetic tape as units of information of an actual data record and eliminating a transfer of said noise records to said central processing unit, said detection means comprising: input register means coupled to said magnetic tape device for receiving said noise and data signals transferred to said peripheral controller apparatus as said units of information; buffer memory means coupled to input register means and to said central processing unit interface, said buffer storage means having a plurality of addressable storage locations; addressing means coupled to said buffer storage means, said addressing means being operative to condition said buffer memory means to select an initial storage location and successive locations within said buffer memory means for storing said units of information received from said input register storage means; noise record detection means coupled to said addressing means, said detection means in response to signals accumulated from said data source indicating that a predetermined minimum number of said units of information has been transferred and stored in said buffer storage means being operative to geneRate a signal for conditioning said addressing means so as to enable read out of said units of information; and, control means coupled to said noise detection means and to said addressing means, said control means being conditioned by said noise detection means in the absence of said signal and transfer of units of information from said device for a predetermined period of time to force said addressing means to condition said buffer memory means to select again said initial storage location for storing new signals transferred from said input register means.

Claim 15

The system of claim 12 wherein said addressing means includes: input counter means coupled to said buffer memory means for storing address signals specifying a storage location into which an unit of information received from said source is to be stored; and, output counter means coupled to said buffer means for storing address signals specifying a storage location from which a stored unit of information is to be read out to said interface; and said control means conditioned by said noise record detection means upon detecting said predetermined minimum number of generate a control signal to apply address signals from said output counter to condition said buffer memory means for read out of said units of information.

Claim 16

The system of claim 13 wherein said control means includes: comparator gating means coupled to said input and output counter means, said comparator gating means being operative to produce an output signal upon detecting a difference in value between said address signals of said output counter means and said input counter means corresponding to a predetermined number; and, output means coupled to said noise record detection means and to said comparator gating means, said output means being conditioned by said noise record detection means to generate said control signal only in the presence of said output signal thereby enabling said read out only when said buffer memory means stores a plurality of units of information corresponding to said predetermined number.

Claim 17

The system of claim 14 wherein said control means includes means coupled to said interface and to said output means, said means being operative in response to said control signal to apply a cycle request signal to said system for transferring an unit of information from said buffer memory means to said interface.

Claim 18

The system of claim 12 wherein said noise record detection means includes: first gating means connected to receive a format signal indicating a formatting of said units of information being received from said data source and at least one of said signals indicative of accumulating a first predetermined number, said first gating means being operative to produce a first output signal indicating storage of a minimum size record for at least one formatting of said units of information, second gating means connected to receive said signals indicative of accumulating a second predetermined count, said first gating means being operative to produce a second output signal indicating storage of a minimum size record for a different formatting of said units of information; and bistable means coupled to said first and second gating means, said bistable means in response to either said first or second output signals being operative to switch from a first to a second state signaling that said units stored constitute an actual data record; said control means being conditioned by said bistable means when in said first second states respectively to enable and inhibit the forcing of said addressing means to select again said initial storage location.

Claim 19

The system of claim 16 wherein said noise record detection means further includes: selection means having first and second inputs and outputs coupled to said bistable means, said first input being connected to receive a first signal indicating that a first criterion is selected for establishing said minimum size record anD said second input being connected to receive a signal indicating that a second criterion is selected for establishing said minimum size record, said selection means being connected to condition said bistable means to be switched to said second state only in response to said accumulated signals indicating that a selected one of said criteria has been met.

Claim 20

The system of claim 17 wherein said selection means when arranged to select said first criterion is operative to condition said bistable means to switch to said second state in response to said first and second output signals indicating that said buffer storage means stores a number of units of information corresponding to the minimum size record for a record having units of information arranged in either 1 X 1 or 2 X 1 format and in a 4 X 3 format respectively and wherein said selection means when arranged to select said second criterion is operative to condition said bistable means to switch to said second state in response to accumulated signals indicating that said buffer storage means stores a number of units of information corresponding to a programmed established larger minimum size record.

Claim 21

The system of claim 18 wherein said noise record detection means further includes minimum record bistable means, said bistable means being connected to said addressing means and to said first and second gating means for receiving signals representative of the number of units of information stored in said buffer memory means, said record bistable means being connected to said selection means and being operative to switch from a first to a second state generating said signal indicating that said number corresponds to said programmed established minimum size record.

Claim 22

A peripheral controller for eliminating a transfer to an input/output interface of noise signals read as units of information from an interrecord gap between data records on a magnetic tape by a magnetic tape device coupled to said controller, said peripheral controller comprising: storage register means coupled to receive said units of information transferred by said device as read from said magnetic tape; an addressable buffer memory having a plurality of storage locations, said buffer memory being coupled to said storage register means for receiving said units of information and coupled to said interface for transferring only units of information of an actual data record; addressing means coupled to said buffer memory, said addressing means being operative to condition said buffer memory to select an initial storage location and successive locations within said memory; noise record detection means coupled to said addressing means, said noise detection means being operative in response to signals indicating that a minimum number of said units are stored in said memory to generate a signal for conditioning said addressing means to apply address signals to said memory for read out of said units; and, control means coupled to said noise record detection means and to said addressing means, said control means being conditioned by said noise detection means signal in the absence of said signal when there is an absence in recceiving said units from said device for a predetermined period of time to force said addressing means to condition said buffer memory to select again said initial storage location.

Claim 23

A peripheral controller for eliminating a transfer to an input/output interface of noise signals read as units of information from an interrecord gap between data records on a magnetic tape by a magnetic tape device coupled to said controller, said peripheral controller comprising: storage register means coupled to receive said units of information transferred by said device as read from said magnetic tape; an addressable buffer memory having a plurality of storage locations, said buffer memory being coupled to said storage register means for receiving said units of information and coupled to said interface for transferring only units of information of an actual data record; addressing means coupled to said buffer memory, said addressing means being operative to condition said buffer memory to select an initial storage location and successive locations within said memory; noise record detection means coupled to said addressing means, said noise detection means being operative in response to signals indicating that a minimum number of said units are stored in said memory to generate a signal for conditioning said addressing means to apply address signals to said memory for read out of said units; and, control means coupled to said noise record detection means and to said addressing means, said control means being conditioned by said noise detection means signal in the absence of said signal when there is an absence in recceiving said units from said device for a predetermined period of time to force said addressing means to condition said buffer memory to select again said initial storage location.

Claim 24

The peripheral controller of claim 20 wherein said addressing means includes: input counter means coupled to said buffer memory for storing address signals specifying a storage location into which an unit of information received from said device is to be stored; and, output counter means coupled to said buffer memory for storing address signals specifying a storage location from which a stored unit of information is to be read out to said interface; and said control means conditioned by said noise record detection means upon establishing said minimum number to generate a control signal to aPply address signals from said output counter to condition said buffer memory means for read out of said units of information.

Claim 25

The peripheral controller of claim 21 wherein said control means includes; comparator gating means coupled to said input and output counter means, said comparator gating means being operative to produce an output signal upon detecting a difference in value between said address signals of said output counter means and said input counter means corresponding to a predetermined number; and, output means coupled to said noise detection means and to said comparator gating means, said output means being conditioned by said noise record detection means to generate said control signal only in the presence of said output signal thereby enabling said read out only when said buffer storage means stores a plurality of units of information corresponding to said predetermined number.

Claim 26

The peripheral controller of claim 22 wherein said control means includes means coupled to said interface and to said output means, said means being operative in response to said control signal to apply a cycle request signal to said interface for transferring an unit of information from said buffer memory to said interface.

Claim 27

The peripheral controller of claim 20 wherein said noise record detection means includes: first gating means connected to receive a format signal indicating a formatting of said units of information being received from said device and one of said signals indicative of a first predetermined number, said first gating means being operative to produce a first output signal indicating storage of a minimum size record for at least one formatting of said units of information, second gating means connected to receive said signals indicative of a second predetermined number, said second gating means being operative to produce a second output signal indicating storage of a minimum size record for a different formatting of said units of information; and bistable means coupled to said first and second gating means, said bistable means in response to either said first or second output signals being operative to switch from a first to a second state signaling that said units stored constitute an actual data record; said control means being conditioned by said bistable means when in said first and second states respectively to enable and inhibit the forcing of said addressing means to select again said initial storage location.

Claim 28

The peripheral controller of claim 24 wherein said noise record detection means further includes: selection means having first and second inputs and an output coupled to said bistable storage means, said first input being connected to receive a first signal indicating that a first criterion is selected for establishing said minimum size record and said second input being connected to receive a signal indicating that a second criterion is selected for establishing said minimum size record, said selection means being connected to condition said bistable means to be switched to said second only in response to accumulated signals indicating that a selected one of said criteria has been met.