Amplifiers with parallel-connected amplifying stages

Claim 2

In combination; a constant voltage signal source; a constant current signal source; and an output load; characterized in that: said sources are phase coherent; and in that said sources and said load are connected in series.

Claim 3

In combination: a constant voltage signal source; a constant current signal source; and an output load; characterized in that: said sources are phase coherent; and in that said sources and said load are connected in parallel.

Claim 4

In combination: a constant voltage signal source; a constant current signal source; and an output load; characterized in that: said sources are phase coherent; and in that said sources and said load are connected in parallel.

Claim 5

An amplifier for coupling a signal source to an output load comprising: two amplifying stages; one of said stages having an output impedance that is at least an order of magnitude smaller than the impedance of said output load; the other of said stages having an output impedance that is at least an order of magnitude larger than the impedance of said output load; means for coupling the output ends of said stages and said output load in series; and means for coupling said signal source to the input end of each of said stages.

Claim 6

An amplifier for coupling a signal source to an output load comprising: two amplifying stages; one of said stages having an output impedance that is at least an order of magnitude smaller than the impedance of said output load; the other of said stages having an output impedance that is at least an order of magnitude larger than the impedance of said output load; means for coupling the output ends of said stages and said output load in series; and means for coupling said signal source to the input end of each of said stages.

Claim 7

The amplifier in accordance with claim 3 wherein: the output end of said one stage includes a first transistor connected in the comMon collector configuration; the output end of said other stage includes a second transistor connected in the common base configuration; and wherein the emitter of said first transistor, the collector of said second transistor, and said output load are connected in series.

Claim 8

The amplifier according to claim 3 wherein: the output voltage from said one stage is v1; the output current from said other stage is i2; the magnitude of said load impedance is ZL; and wherein v1/i2 ZL/1+P where P is the ratio of the output power delivered to said load by said other stage to the output power delivered to said load by said one stage.

Claim 9

An amplifier for coupling a signal source to an output load comprising: two amplifying stages; one of said stages having an output impedance that is at least an order of magnitude smaller than the impedance of said output load; the other of said stages having an output impedance that is at least an order of magnitude larger than the impedance of said output load; means for coupling the output ends of said stages and said output load in parallel; and means for coupling said signal source to the input end of each of said stages.

Claim 10

An amplifier for coupling a signal source to an output load comprising: two amplifying stages; one of said stages having an output impedance that is at least an order of magnitude smaller than the impedance of said output load; the other of said stages having an output impedance that is at least an order of magnitude larger than the impedance of said output load; means for coupling the output ends of said stages and said output load in parallel; and means for coupling said signal source to the input end of each of said stages.

Claim 11

The amplifier in accordance with claim 6 wherein: the output end of said one stage includes a first transistor connected in the common collector configuration; the output end of said other stage includes a second transistor connected in the common base configuration; and wherein the emitter of said first transistor, the collector of said second transistor, and said output load are connected in parallel.

Claim 12

The amplifier according to claim 6 wherein: the output voltage from said one stage is v1; the output current from said other stage is i2; the magnitude of said load impedance is ZL; and wherein v1/i2 ZL (1+P) where P is the ratio of the output power delivered to said load by said one stage to the output power delivered to said load by said other stage.

Claim 13

An amplifier for coupling a signal source to a common output load of magnitude ZL comprising: first, second and third transistors; said first transistor being connected in the common collector configuration; said third transistor being connected in the common base configuration; output means for connecting the emitter of said first transistor and the collector of said second transistor in parallel with said output load, and for connecting the emitter of said second transistor and the collector of said third transistor in series with said output load; and input means for coupling said signal source to the base of each of said first and second transistors, and to the emitter of said third transistor.

Claim 14

An amplifier for coupling a signal source to a common output load of magnitude ZL comprising: first, second and third transistors; said first transistor being connected in the common collector configuration; said third transistor being connected in the common base configuration; output means for connecting the emitter of said first transistor and the collector of said second transistor in parallel with said output load, and for connecting the emitter of said second transistor and the collector of said third transistor in series with said output load; and input means for coupling said signal source to the base of each of said first and second transistors, and to the emitter of said third transistor.

Claim 15

The amplifier according to claim 9 wherein said signal source and said input means induce: a voltage v1 at the base of said first transistor; a voltage -v1 at the base of said second transistor; and a current i2 at the emitter of said third transistor; where v1/i2 ZL/2.

Claim 16

The amplifier according to claim 9 wherein said output means is a two winding transformer having a primary winding to secondary winding turns ratio of 1:2; and wherein: the emitter of said first transistor and the collector of said second transistor are connected to a center tap along said secondary winding; the output load is connected to one end of said secondary winding; a matching impedance is connected to the other end of said secondary winding; and the emitter of said second transistor and the collector of said third transistor are connected in series with the primary winding of said transformer.

Claim 17

An amplifier for coupling a signal source to an output load of Magnitude ZL comprising: first, second and third transistors and a twowinding transformer; said first and said second transistors being connected in the common collector configuration; said third transistor being connected in the common base configuration; one transformer winding being connected between the emitter of said second transistor and the collector of said third transistor; the other transformer winding being connected across said output load; the emitter of said first transistor being connected to one end of said output load through a series resistor having an impedance ZL; the other end of said output impedance being grounded; and input means for coupling said signal source to the base of said first and second transistors and to the emitter of said third transistor.

Claim 18

An amplifier for coupling a signal source to an output load of Magnitude ZL comprising: first, second and third transistors and a twowinding transformer; said first and said second transistors being connected in the common collector configuration; said third transistor being connected in the common base configuration; one transformer winding being connected between the emitter of said second transistor and the collector of said third transistor; the other transformer winding being connected across said output load; the emitter of said first transistor being connected to one end of said output load through a series resistor having an impedance ZL; the other end of said output impedance being grounded; and input means for coupling said signal source to the base of said first and second transistors and to the emitter of said third transistor.

Claim 19

The amplifier according to claim 12 where said input coupling means includes: a two-winding transformer having one winding connected to said signal source and the other winding connected to the emitter of said third transistor through a series resistor; means for connecting the base of said second transistor to a tap along the one transformer winding; and means for connecting the base of said first transformer to said signal source.