US3859988A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Open lead testing system for eeg
Assignee: Beckman Coulter Inc
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Filing: 1973-04-30
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Granted: 1975-01-14
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Expires: 1993-04-30
Abstract
Abstract A system for continuous monitoring for open circuits in multiple lead EEG systems during patient testing. Means are provided for repetitively applying a low current signal, having a distinctive waveform and frequency, to each electrode of the system. In the event an electrode is detached from the patient''s scalp or otherwise open, the distinctive signal is apparent in the recorded output. Otherwise the distinctive signal is of such low magnitude that it is below the signal-to-noise ratio of the EEG amplifier. In systems including multiple leads, the test signal is successively applied to each electrode in the system in a time-controlled sequence. In one preferred embodiment a distinctive signal is used comprising a four pulse burst of 25 Hz frequency.
Inventors
- 👤 Jr Cecil C Lencioni
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 19:10
CPC Classifications
A; A61; A61B; A61B5/00; A61B5/24; A61B5/25; A61B5/276; A61B5/316; A61B5/369; G; G01; G01R; G01R31/00; G01R31/50; G01R31/58; G01R31/60
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
93 words
A test system for identifying open circuit electrodes of a multi-electrode EEG system during patient testing comprising pulse generating means for producing an alternating electrical signal, counter means responsive to the alternating electrical signal for producing first and second pulse signals, logic ciruit means responsive to said first and second pulse signals for selectively producing a plurality of identical test signals each corresponding to a different EEG electrode, said test signals occurring at different times within a predetermined test sequence, and circuit means for conducting each test signal to said corresponding EEG electrode.
Claim 2
Dependent Claim
93 words
A test system for identifying open circuit electrodes of a multi-electrode EEG system during patient testing comprising pulse generating means for producing an alternating electrical signal, counter means responsive to the alternating electrical signal for producing first and second pulse signals, logic ciruit means responsive to said first and second pulse signals for selectively producing a plurality of identical test signals each corresponding to a different EEG electrode, said test signals occurring at different times within a predetermined test sequence, and circuit means for conducting each test signal to said corresponding EEG electrode.
Claim 3
Dependent Claim
87 words
A test system as described in claim 1 wherein said counter means include binary counter means for producing said first pulse signal and decade counter means for producing said second pulse signal, with said first pulse signal having a repetition rate higher than said second pulse signal, and wherein said logic circuit means comprise selectively operable gate means connected to said binary counter means and said decade counter Means for producing a plurality of test signals each comprising a burst of pulses of predetermined frequency and amplitude.
Claim 4
Dependent Claim
61 words
The test system of claim 2 further including means for maintaining the amplitude of pulses from said gate means at a level sufficiently low that said test signals are lower than the signal-to-noise ratio of the amplifier of the EEG system whereby the test signal remains undetected in the output of the EEG system unless an open circuit condition occurs therein.
Claim 5
Dependent Claim
183 words
A test system for identifying open circuit electrodes within a multi-electrode EEG system during patient use comprising pulse generating means for producing an alternating electrical signal, first counter means connected to said pulse generating means for producing first and second pulse signals, logic circuit means responsive to said first and second pulse signals for producing corresponding sets of test signals of identical form, said first and second sets of test signals comprising bursts of pulses of predetermined frequency, with the bursts of the first set of said signals occurring at a different time than the bursts of pulses within said second set, decade counter means connected to said binary counter means for producing sequencing pulse signals, and second logic circuit means responsive to said first and second sets of test signals and said sequencing signals for producing a plurality of bursts of test signals of identical form, with each burst of signals corresponding to a different EEG electrode and occurring at a different time within a predetermined test sequence, and circuit means for conducting each burst of signals to said corresponding EEG electrode.
Claim 6
Dependent Claim
183 words
A test system for identifying open circuit electrodes within a multi-electrode EEG system during patient use comprising pulse generating means for producing an alternating electrical signal, first counter means connected to said pulse generating means for producing first and second pulse signals, logic circuit means responsive to said first and second pulse signals for producing corresponding sets of test signals of identical form, said first and second sets of test signals comprising bursts of pulses of predetermined frequency, with the bursts of the first set of said signals occurring at a different time than the bursts of pulses within said second set, decade counter means connected to said binary counter means for producing sequencing pulse signals, and second logic circuit means responsive to said first and second sets of test signals and said sequencing signals for producing a plurality of bursts of test signals of identical form, with each burst of signals corresponding to a different EEG electrode and occurring at a different time within a predetermined test sequence, and circuit means for conducting each burst of signals to said corresponding EEG electrode.
Claim 7
Dependent Claim
61 words
The test system of claim 4 wherein said second logic circuit means produce a first plurality of test signals of positive amplitude and a second plurality of test signals of negative amplitude whereby test signals applied at the same time to adjacent electrodes of the EEG system are not canceled due to the common mode rejection characteristics of the EEG amplifiers.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-01-13 | 1978-07-15 | 1979-01-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-01-13 | 1982-07-15 | 1983-01-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-01-13 | 1986-07-15 | 1987-01-14 | $7700.00 | Window Closed / Lapsed |