US3859656A
Expired / Lapsed
US
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Instrusion detection means having cycle counting interlock response control means
Assignee: Johnson Service Co
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Filing: 1972-08-03
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Granted: 1975-01-07
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Expires: 1992-08-03
Abstract
Abstract A Doppler motion frequency signal is generated by the movement of an intruder in a radio frequency energy field. The signal is to establish a series of related pulses which are simultaneously applied to all clock inputs of a shift register and to a timer. An alarm signal line is connected to any one of the shift register outputs and a reset signal line is connected from the next output. The timer preferably employs a programmable unijunction transistor and a predetermined time after a last pulse occurs generates a reset pulse to reset the shift register and initiate a new counting cycle. A predetermined number of cycles must occur within a predetermined time which is less than the normal timing cycle of the timer in order to prevent the timer from triggering and resetting the counting device.
Inventors
- 👤 Carl F Klein
- 👤 James R Bailey
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 21:53
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/02; G01S13/50; G01S13/52; G01S13/56
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
170 words
An intrusion detection apparatus wherein the movement of an object within a selected secured area generates a series of pulse signals related to such movement, comprising counting means to detect the number of said pulse signals and having an output means activated in response to a selected predetermined plurality of said signals, a timing control means operable to control said counting means to eliminate the effect of the receipt of selected signals and operably disabled in response to said pulse signals to require a subsequent receipt of said predetermined plurality of said signals to activate said output means, said counting means to detect the number of said pulses including a clock counter having a plurality of counting stages and establishing a corresponding plurality of related output connection means, said output means being selectively connected to one of said output connection means to respond to a corresponding count, and said counter having a counter reset means connected to a subsequent connection means following the connection means connected to said output means.
Claim 2
Dependent Claim
170 words
An intrusion detection apparatus wherein the movement of an object within a selected secured area generates a series of pulse signals related to such movement, comprising counting means to detect the number of said pulse signals and having an output means activated in response to a selected predetermined plurality of said signals, a timing control means operable to control said counting means to eliminate the effect of the receipt of selected signals and operably disabled in response to said pulse signals to require a subsequent receipt of said predetermined plurality of said signals to activate said output means, said counting means to detect the number of said pulses including a clock counter having a plurality of counting stages and establishing a corresponding plurality of related output connection means, said output means being selectively connected to one of said output connection means to respond to a corresponding count, and said counter having a counter reset means connected to a subsequent connection means following the connection means connected to said output means.
Claim 3
Dependent Claim
176 words
An intrusion detection apparatus wherein an intruding body generates a series of alarm signals, comprising a counting means for counting the number of said alarm signals and retaining the count until said counting means is positively reset, said counting means having a counter reset means, output means connected to said counting means, a timing means having a starting time condition and establishing periodic time spaced output signals from said starting time condition and connected to said counter reset means, said timing means having a timing reset means to reset the timing means to said starting time condition during a timing cycle, and an input circuit means for coupling of said alarm signals to said counting means and said timing means for receiving each of said signals and simultaneously actuating said counting means to count the alarm signals and selectively resetting said timing means to its starting time condition in response to receipt of the alarm signals and whereby said alarm is actuated if the counting rate is sufficiently great to prevent the timer from timing out.
Claim 4
Dependent Claim
176 words
An intrusion detection apparatus wherein an intruding body generates a series of alarm signals, comprising a counting means for counting the number of said alarm signals and retaining the count until said counting means is positively reset, said counting means having a counter reset means, output means connected to said counting means, a timing means having a starting time condition and establishing periodic time spaced output signals from said starting time condition and connected to said counter reset means, said timing means having a timing reset means to reset the timing means to said starting time condition during a timing cycle, and an input circuit means for coupling of said alarm signals to said counting means and said timing means for receiving each of said signals and simultaneously actuating said counting means to count the alarm signals and selectively resetting said timing means to its starting time condition in response to receipt of the alarm signals and whereby said alarm is actuated if the counting rate is sufficiently great to prevent the timer from timing out.
Claim 5
Dependent Claim
34 words
The intrusion detection apparatus of claim 2 wherein said timing reset means is constructed to respond to each of said alarm signals and resets the timing means to thereby initiate a new timing period.
Claim 6
Dependent Claim
48 words
The detection apparatus of claim 2 wherein said counting means includes a clock counter having a plurality of counting stages and establishing a corresponding plurality of related output connection means, said output means being selectively connected to one of said connection means to respond to a corresponding count.
Claim 7
Dependent Claim
28 words
The detection apparatus of claim 4 wherein said counter reset means is connected to a succeeding output connection means following the connection means connected to said output means.
Claim 8
Dependent Claim
20 words
The detection apparatus of claim 5 wherein said reset means is connected to the immediate next succeeding output connection means.
Claim 9
Dependent Claim
93 words
The intrusion detection apparatus of claim 2 comprising a transmitting and receiving means for establishing electromagnetic transmitted energy as a field within a secured area and for receiving of reflected energy from a moving body within said field, means for mixing of said transmitted and reflected energy to establish an intermediate related beat frequency and to establish a rectified output signal, means to amplify said rectified output signal, a triggered threshold detector to establish a pulse signal for each amplified signal of a preselected minimum amplitude to form said series of alarm signals.
Claim 10
Dependent Claim
94 words
The detection apparatus of claim 2 wherein said counting means is a shift register having a plurality of count stages interconnected for sequential turn on in response to a common clock input line connected to said input circuit means and interconnected to a common reset line for resetting of the on-stage in response to a signal at the reset line, each of said stages including an output terminal means, said output means being releasably connected to one of said output terminal means and energized in response to a corresponding turn-on of the count stage.
Claim 11
Dependent Claim
37 words
The detection apparatus of claim 8 wherein said shift register includes a selection reset line connected to said common reset line and selectively connected to the output terminal means of a stage following the output energizing stage.
Claim 12
Dependent Claim
58 words
The detection apparatus of claim 2 wherein said timing means including a programmable unijunction transistor connected in a relaxation oscillator circuit to produce a periodic output signal and connected to said counting means, and said input circuit means being connected to said relaxation oscillator to reset the oscillator to a start condition in response to each alarm signal.
Claim 13
Dependent Claim
144 words
The detection apparatus of claim 2 wherein said counting means is a shift register having a plurality of count stages interconnected for sequential turn on in response to a common clock input line connected to said input circuit means and each stage has a counter reset means interconnected by a common reset line to said timing means for resetting of the on-stage in response to a signal at the reset line, each of said stages including an output terminal means, said output means including a self-latching alarm circuit and a switching circuit connected to one of said output terminal means and energized in response to a corresponding momentary turn-on of the count stage, and said shift register including a selection reset line connected to said common reset line and selectively connected to the output terminal of the stage immediately following the output energizing stage.
Claim 14
Dependent Claim
16 words
The detection apparatus of claim 11 wherein said timing reset means responds to each alarm signal.
Claim 15
Dependent Claim
163 words
The detection of apparatus of claim 2 wherein said counting means is a shift register having a plurality of count stages interconnected for sequential turn-on in response to a common clock input line connected to said input circuit means and interconnected to a common reset line for resetting of the onstage in response to a signal at the reset line, each of said stages including an output terminal, said output means being connected to one of said output terminals and energized in response to a corresponding turn-on of the count stage, a selection reset line connected to said common reset line and selectively connected to the output terminal of the stage immediately following the output energizing stage, said timing means including a programmable unijunction transistor connected in a relaxation oscillator circuit to produce a periodic output signal and connected to said common reset line, and said input circuit means being connected to said relaxation oscillator to reset the oscillator to a start condition.
Claim 16
Dependent Claim
78 words
The intrusion detection apparatus of claim 13 including a traNsmitting and receiving means for establishing electromagnetic transmitted energy as a field within a secured area and for receiving of reflected energy from a moving body within said field, means for mixing of said transmitted and reflected energy to establish an intermediate related beat frequency and to establish a rectified output signal, a threshold detector to establish an alarm signal for each output signal of a preselected minimum amplitude.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-01-06 | 1978-07-08 | 1979-01-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-01-06 | 1982-07-08 | 1983-01-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-01-06 | 1986-07-08 | 1987-01-07 | $7700.00 | Window Closed / Lapsed |