US3858119A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Folded push-pull amplifier
Assignee: Raytheon Co
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Filing: 1973-06-18
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Granted: 1974-12-31
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Expires: 1993-06-18
Abstract
Abstract A push-pull amplifier circuit adapted to permit an amplifying element in one branch of the circuit to provide amplification during both positive and negative portions of an input signal. In a preferred embodiment of the invention, the circuit comprises an input transformer and an output transformer, an input terminal of the amplifying element being coupled via diode circuitry to both terminals of the secondary winding of the input transformer, an output terminal of the amplifying element being coupled via controlled rectifier circuitry to the two terminals of the primary winding of the output transformer, center tap of the input transformer secondary winding being coupled to a center tap of the output transformer primary winding and a source of power being applied between a third terminal of the amplifying element and the center taps. A control circuit coupled to the power supply and the terminals of the secondary winding of the input transformer operates the controlled rectifier circuitry for passing current from the amplifying element alternately through the terminals of the input winding of the output transformer.
Inventors
- 👤 B Engelhardt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 19:51
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/02; H03F1/0205; H03F1/0211; H03F1/0244; H03F3/00; H03F3/26
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
84 words
A circuit comprising: a transformer having a plurality of terminals; means coupled to a source of input signal for amplifying said signal; and switching means coupled between said amplifying means and each of said terminals of said transformer, said switching means sequentially connecting said amplifying means to successive ones of said transformer terminals for coupling said amplified signal during successive portions of said input signal to successive ones of said terminals of said transformer, said transformer serving to couple said power to a load.
Claim 2
Dependent Claim
84 words
A circuit comprising: a transformer having a plurality of terminals; means coupled to a source of input signal for amplifying said signal; and switching means coupled between said amplifying means and each of said terminals of said transformer, said switching means sequentially connecting said amplifying means to successive ones of said transformer terminals for coupling said amplified signal during successive portions of said input signal to successive ones of said terminals of said transformer, said transformer serving to couple said power to a load.
Claim 3
Dependent Claim
24 words
A circuit according to claim 1 further comprising a second transformer for coupling said amplifying means and said switching means to said input signal.
Claim 4
Dependent Claim
39 words
A circuit according to claim 2 wherein said switching means comprises controlled rectifier means and a circuit responsive to the instantaneous value of said input signal for operating said controlled rectifier means during successive portion of said input signal.
Claim 5
Dependent Claim
37 words
A circuit according to claim 3 wherein said switching means further comprises a plurality of amplifiers coupled to respective ones of said controlled rectifier means for amplifying said input signal during predetermined portions of said input signal.
Claim 6
Dependent Claim
52 words
A circuit according to claim 4 further comprising a biasing circuit coupled between said amplifying means and said second transformer for activating said amplifying meand at values of said input signal which are greater than a value of said input signal which can be amplified by said amplifiers of said switching means.
Claim 7
Dependent Claim
134 words
An amplifier circuit comprising: a plurality of serially connected transistors coupled together such that emitter current from one of said transistors flows through a second of said transistors; diode means coupled to respective ones of the points of interconnection between said serially coupled transistors, said diode means coupling successive ones of said points of interconnection to successively greater values of electric potential; means coupled to said serially coupled transistors for sequentially passing an input signal in accordance with the magnitude of said input signal to successive ones of said serially coupled transistors; and means coupled between the last one of said sErially coupled transistors and the terminals of a load energizing circuit for switchably connecting said last one of said serially coupled transistors to individual ones of said terminals of said load energizing circuit.
Claim 8
Dependent Claim
134 words
An amplifier circuit comprising: a plurality of serially connected transistors coupled together such that emitter current from one of said transistors flows through a second of said transistors; diode means coupled to respective ones of the points of interconnection between said serially coupled transistors, said diode means coupling successive ones of said points of interconnection to successively greater values of electric potential; means coupled to said serially coupled transistors for sequentially passing an input signal in accordance with the magnitude of said input signal to successive ones of said serially coupled transistors; and means coupled between the last one of said sErially coupled transistors and the terminals of a load energizing circuit for switchably connecting said last one of said serially coupled transistors to individual ones of said terminals of said load energizing circuit.
Claim 9
Dependent Claim
40 words
A circuit according to claim 6 further comprising means coupled to said switching means and responsive to the amplitude of said input signal for operating said switching means when the value of said input signal amplitude attains a predetermined value.
References Cited (Backward Citations)
US3484709A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-12-30 | 1978-07-01 | 1978-12-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-12-30 | 1982-07-01 | 1982-12-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-12-30 | 1986-07-01 | 1986-12-31 | $7700.00 | Window Closed / Lapsed |