US3855609A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Space charge limited transistor having recessed dielectric isolation
Assignee: International Business Machines Corp
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Filing: 1973-12-26
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Granted: 1974-12-17
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Expires: 1993-12-26
Abstract
Abstract A space charge limited transistor formed on a high resistivity substrate of at least 10,000 ohm-centimeter silicon of one conductivity type. One surface of the substrate is provided with spaced recessed oxide regions. The alternate spaces between the oxide regions are occupied by impurity zones of said one conductivity type. The intervening alternate spaces between the oxide regions are occupied by impurity zones of the other conductivity type. The impurity concentrations of the aforesaid impurity zones are at least several orders of magnitude higher than that of the substrate where the zones are separated from each other by the aforesaid oxide regions. The dielectric relaxation time is much larger than the carrier transit time within the substrate below and between adjacent impurity zones of the same conductivity type.
Inventors
- 👤 I Magdo
- 👤 S Magdo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 03:51
CPC Classifications
H; H10; H10D; H10D99/00; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/10; H10W10/13
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
164 words
A space charge limited transistor comprising: a high resistivity substrate of at least 10,000 ohmcentimeter semiconductor material, a first impurity zone of one conductivity type extending from one surface of said substrate into the interior thereof, a pair of second impurity zones of the other conductivity type extending from said one surface of said substrate into the interior thereof, said first zone being located between said second zones, at least one recessed dielectric region extending from said one surface of said substrate into the interior thereof and separating a respective one of said second zones from said first zone, and means for biasing said zones for transistor operation including means for forward biasing said first zone relative to one of said second zones and for reverse biasing said first zone relative to the other of said second zones, the region of said high resistivity substrate beneath said one zone being characterized by a dielectric relaxation time much larger than the carrier transit time therein.
Claim 2
Dependent Claim
164 words
A space charge limited transistor comprising: a high resistivity substrate of at least 10,000 ohmcentimeter semiconductor material, a first impurity zone of one conductivity type extending from one surface of said substrate into the interior thereof, a pair of second impurity zones of the other conductivity type extending from said one surface of said substrate into the interior thereof, said first zone being located between said second zones, at least one recessed dielectric region extending from said one surface of said substrate into the interior thereof and separating a respective one of said second zones from said first zone, and means for biasing said zones for transistor operation including means for forward biasing said first zone relative to one of said second zones and for reverse biasing said first zone relative to the other of said second zones, the region of said high resistivity substrate beneath said one zone being characterized by a dielectric relaxation time much larger than the carrier transit time therein.
Claim 3
Dependent Claim
38 words
The transistor defined in claim 1 and further including a second recessed dielectric region extending from said one surface of said substrate into the interior thereof and separating the other of said second zones from said first zone.
Claim 4
Dependent Claim
22 words
The transistor defined in claim 1 wherein said second zones extend deeper into the interior of said substrate than said first zone.
Claim 5
Dependent Claim
20 words
The transistor defined in claim 1 wherein said first and second zones extend equally into the interior of said substrate.
Claim 6
Dependent Claim
19 words
The transistor defined in claim 1 wherein said second zones and said substrate are of the same conductivity type.
Claim 7
Dependent Claim
18 words
The transistor defined in claim 1 wherein the resistivity of said substrate is at least 30,000 ohm centimeters.
Claim 8
Dependent Claim
35 words
The transistor defined in claim 1 wherein said first zone provides an ohmic contact to the base of said transistor and said second zones provide ohmic contacts to the emitter and collector of said transistor.
Claim 9
Dependent Claim
17 words
The transistor defined in claim 1 wherein each said dielectric isolation region is a silicon dioxide region.
Claim 10
Dependent Claim
33 words
The transistor defined in claim 2 wherein all said zones are of at least the order of 1019 atoms per cubic centimeter concentration and form abrupt intrinsic types of junctions with said substrate.
Claim 11
Dependent Claim
13 words
The transistor defined in claim 5 wherein said same conductivity type is N.
References Cited (Backward Citations)
US3492174A
Cited
US3591840A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-12-16 | 1978-06-17 | 1978-12-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-12-16 | 1982-06-17 | 1982-12-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-12-16 | 1986-06-17 | 1986-12-17 | $7700.00 | Window Closed / Lapsed |