US3852687A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High rate digital modulation/demodulation method
Assignee: International Business Machines Corp
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Filing: 1973-07-02
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Granted: 1974-12-03
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Expires: 1993-07-02
Abstract
Abstract An electrical digital transmission method and circuits for improving recorded or transmitted information density. The embodiment serially modulates signal switching with a separation of at least two adjacent clock periods and not over eight clock periods in any sequence of byte transmissions. A fixed length transmission per byte is used. A serial clock cycle is provided per data byte and may be divided into two clock cycle sections. The first clock period of each section is not available for information modulation switching. The remaining clock periods of each section are available to contain electrical current switchings to encode a part of an information byte by permuting the switchings while maintaining the required switching separation. The first clock period of each section contains a switching only if no information induced switching occurs in its adjacent clock periods. These clock switchings assure an output switching within a maximum number of clock periods equal to the longest of the two sections.
Inventors
- 👤 P Hodges
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 19:09
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426; H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4904
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
353 words
Electrical apparatus for modulating an electrical wave with each received byte containing first and second groups of electrical bit signals, the modulated electrical wave having minimum and maximum multiple clock periods of run-length-limited coding, comprising a clock circuit for generating a set of electrical timing pulses for each received byte to sequentially signal a plurality of clock periods in first and second sequential clock pulse sections, an encoder circuit having first and second parts respectively receiving the first and second groups of electrical bit signals and the timing pulses of the first and second sequential clock pulse sections, the first part in said encoder circuit having means for switching a first electrical waveform between two electrical levels with the first group of electrical bit signals and the timing pulses of the first sequential clock pulse section to generate a different electrical waveform for each different combination of electrical bit signals in said first group, the electrical switchings in the first waveform being spaced by at leasT two clock periods during said first sequential clock pulse section, and said first waveform excluding a bounding clock period of the first section, the second part in said encoder circuit having means for switching a second electrical waveform between two electrical levels with the second group of electrical bit signals and the timing pulses of the second sequential clock pulse section to generate a different electrical waveform for each combination of electrical bit signals in the second group, the electrical switchings in the second waveform being spaced by at least two clock periods during said second sequential clock pulse section, and said second waveform excluding a bounding clock period of the second section, third and fourth means in said first and second parts, respectively, for further switching the electrical level during each bounding clock period in the first and second electrical waveforms if no switching occurs in any clock period adjacent to each bounding clock period, and serializer means connected to an output of said first and second parts to sequentially connect the first and second electrical waveforms as the modulated output signal for each received byte.
Claim 2
Dependent Claim
353 words
Electrical apparatus for modulating an electrical wave with each received byte containing first and second groups of electrical bit signals, the modulated electrical wave having minimum and maximum multiple clock periods of run-length-limited coding, comprising a clock circuit for generating a set of electrical timing pulses for each received byte to sequentially signal a plurality of clock periods in first and second sequential clock pulse sections, an encoder circuit having first and second parts respectively receiving the first and second groups of electrical bit signals and the timing pulses of the first and second sequential clock pulse sections, the first part in said encoder circuit having means for switching a first electrical waveform between two electrical levels with the first group of electrical bit signals and the timing pulses of the first sequential clock pulse section to generate a different electrical waveform for each different combination of electrical bit signals in said first group, the electrical switchings in the first waveform being spaced by at leasT two clock periods during said first sequential clock pulse section, and said first waveform excluding a bounding clock period of the first section, the second part in said encoder circuit having means for switching a second electrical waveform between two electrical levels with the second group of electrical bit signals and the timing pulses of the second sequential clock pulse section to generate a different electrical waveform for each combination of electrical bit signals in the second group, the electrical switchings in the second waveform being spaced by at least two clock periods during said second sequential clock pulse section, and said second waveform excluding a bounding clock period of the second section, third and fourth means in said first and second parts, respectively, for further switching the electrical level during each bounding clock period in the first and second electrical waveforms if no switching occurs in any clock period adjacent to each bounding clock period, and serializer means connected to an output of said first and second parts to sequentially connect the first and second electrical waveforms as the modulated output signal for each received byte.
Claim 3
Dependent Claim
98 words
Electrical modulating apparatus as defined in claim 1, in which said clock circuit generates a cycle of thirteen electrical timing pulses designating thirteen clock periods, the first clock section including eight clock periods, and the second clock section including five clock periods, said third means switching the bounding clock period in said first section, and said fourth means switching the bounding clock period in said second section, whereby a run-length-limited sequence having a minimum of two clock periods and a maximum of eight clock periods between electrical switchings is obtained in a sequence of electrically modulated output signals.
Claim 4
Dependent Claim
240 words
Electrical apparatus for modulating an electrical output with electrical bit signals for each received information group, comprising a clock circuit for generating a set of electrical timing pulses for each received information group to sequentially provide a plurality of clock periods in a sequential clock pulse section, an encoder circuit receiving the electrical bit signals of said information group and the timing pulses from the sequential clock pulse section, a part of said encoder circuit including means for switching an electrical waveform between two electrical levels with the electrical bit signals and the timing pulses from the sequential clock pulse section to generate a different waveform for each different combination of electrical bit signals in said received information groups, in which each waveform has switchings spaced by at least two clock periods, another part of said encoder circuit including means for bounding the electrical waveform on one side with a bounding clock period not used to encode any bits of the received information group, said encoder circuit further switching the electrical waveform during each bounding clock period if no waveform switching occurs in adjacent clock periods, and means for sequentially outputting the electrical waveforms as the modulated signal for each received information group, whereby minimum and maximum multiple clock periods of two and eight clock periods between electrical switchings are provided respectively in the output of said encoder circuit in a sequence of waveforms representing a sequence of information groups.
Claim 5
Dependent Claim
240 words
Electrical apparatus for modulating an electrical output with electrical bit signals for each received information group, comprising a clock circuit for generating a set of electrical timing pulses for each received information group to sequentially provide a plurality of clock periods in a sequential clock pulse section, an encoder circuit receiving the electrical bit signals of said information group and the timing pulses from the sequential clock pulse section, a part of said encoder circuit including means for switching an electrical waveform between two electrical levels with the electrical bit signals and the timing pulses from the sequential clock pulse section to generate a different waveform for each different combination of electrical bit signals in said received information groups, in which each waveform has switchings spaced by at least two clock periods, another part of said encoder circuit including means for bounding the electrical waveform on one side with a bounding clock period not used to encode any bits of the received information group, said encoder circuit further switching the electrical waveform during each bounding clock period if no waveform switching occurs in adjacent clock periods, and means for sequentially outputting the electrical waveforms as the modulated signal for each received information group, whereby minimum and maximum multiple clock periods of two and eight clock periods between electrical switchings are provided respectively in the output of said encoder circuit in a sequence of waveforms representing a sequence of information groups.
Claim 6
Dependent Claim
308 words
An electrical byte modulating method which handles the bits of each received byte provided as first and second groups of electrical bit signals, comprising the steps of 1 generating in a clock circuit a set of electrical timing pulses for each received byte to sequentially provide a plurality of clock periods from first and second sequential clock pulse sections, electrically transferring respectively to first and second parts of an encoder circuit the first and second groups of Electrical bit signals and the electrical timing pulses from the first and second sequential clock pulse sections, switching a first electrical waveform between two electrical levels in the first part of said encoder with the first group of electrical bit signals and the timing pulses from the first sequential clock pulse section to generate a different waveform for each different combination of electrical bit signals in said first group, in which each waveform has switchings spaced by at least two clock periods, also switching a second electrical waveform between two electrical levels in the second part of said encoder with the second group of electrical bit signals and the timing pulses from the second sequential clock pulse section to generate a different waveform for each combination of electrical bit signals in the second group, in which each waveform has switchings spaced by at least two clock periods, bounding the first and second electrical waveforms on one side with a bounding clock period not used to encode any bits of the received byte, further switching the first and second electrical waveforms during each bounding clock period when no waveform switching occurs in adjacent clock periods, and sequentially outputting said first and second electrical waveforms as the modulated signal for each received byte, whereby minimum and maximum multiple clock periods of run-length-limited coding are provided in a fixed-length modulated wave for each byte.
Claim 7
Dependent Claim
308 words
An electrical byte modulating method which handles the bits of each received byte provided as first and second groups of electrical bit signals, comprising the steps of 1 generating in a clock circuit a set of electrical timing pulses for each received byte to sequentially provide a plurality of clock periods from first and second sequential clock pulse sections, electrically transferring respectively to first and second parts of an encoder circuit the first and second groups of Electrical bit signals and the electrical timing pulses from the first and second sequential clock pulse sections, switching a first electrical waveform between two electrical levels in the first part of said encoder with the first group of electrical bit signals and the timing pulses from the first sequential clock pulse section to generate a different waveform for each different combination of electrical bit signals in said first group, in which each waveform has switchings spaced by at least two clock periods, also switching a second electrical waveform between two electrical levels in the second part of said encoder with the second group of electrical bit signals and the timing pulses from the second sequential clock pulse section to generate a different waveform for each combination of electrical bit signals in the second group, in which each waveform has switchings spaced by at least two clock periods, bounding the first and second electrical waveforms on one side with a bounding clock period not used to encode any bits of the received byte, further switching the first and second electrical waveforms during each bounding clock period when no waveform switching occurs in adjacent clock periods, and sequentially outputting said first and second electrical waveforms as the modulated signal for each received byte, whereby minimum and maximum multiple clock periods of run-length-limited coding are provided in a fixed-length modulated wave for each byte.
Claim 8
Dependent Claim
119 words
An electrical byte modulating method as defined in claim 4, in which the first group includes five bits and the second group includes three bits of each received byte, and in which said generating step sequentially generates a byte cycle of 13 clock periods with the first section having eight clock periods and the second section having five clock periods, and said bounding step applies to the first clock period in each clock section, whereby in a sequence of waveforms encoded for a sequence of received bytes, intervening plural clock periods of no waveform switching occur having a minimum of two clock periods and a maximum of eight clock periods between switchings to support self-clocking detection of the waveform.
Claim 9
Dependent Claim
212 words
An electrical byte modulating method which handles the bits of each received information group, comprising the steps of generating in a clock circuit a set of electrical timing pulses for each received information group to sequentially provide a plurality of clock periods in a sequential clock pulse section, electrically transferring respectively to an encoder circuit electrical bit signals of said information group and the sequential clock pulse section, switching an electrical waveform between two electrical levels in said encoder with the electrical bit signals and the timing pulses in the sequential clock pulse section to generate a different waveform for each different combination of electrical bit signals in said information groups, in which each waveform has switchings spaced by at least two clock periods, bounding the electrical waveform on one side with a bounding clock period not used to encode any bits of the received information group, further switching the electrical waveform during each bounding clock period if no waveform switching occurs in adjacent clock periods, and sequentially outputting the electrical waveform as the modulated signal for each received information group, whereby minimum and maximum multiple clock periods of two and eight clock periods between electrical switchings are provided respectively in a sequence of waveforms encoding a sequence of information bit groups.
Claim 10
Dependent Claim
212 words
An electrical byte modulating method which handles the bits of each received information group, comprising the steps of generating in a clock circuit a set of electrical timing pulses for each received information group to sequentially provide a plurality of clock periods in a sequential clock pulse section, electrically transferring respectively to an encoder circuit electrical bit signals of said information group and the sequential clock pulse section, switching an electrical waveform between two electrical levels in said encoder with the electrical bit signals and the timing pulses in the sequential clock pulse section to generate a different waveform for each different combination of electrical bit signals in said information groups, in which each waveform has switchings spaced by at least two clock periods, bounding the electrical waveform on one side with a bounding clock period not used to encode any bits of the received information group, further switching the electrical waveform during each bounding clock period if no waveform switching occurs in adjacent clock periods, and sequentially outputting the electrical waveform as the modulated signal for each received information group, whereby minimum and maximum multiple clock periods of two and eight clock periods between electrical switchings are provided respectively in a sequence of waveforms encoding a sequence of information bit groups.
References Cited (Backward Citations)
US3587090A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-12-02 | 1978-06-03 | 1978-12-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-12-02 | 1982-06-03 | 1982-12-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-12-02 | 1986-06-03 | 1986-12-03 | $7700.00 | Window Closed / Lapsed |