US3852620A
Expired / Lapsed
US
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Electrical pulse generating circuit and method
Assignee: Westinghouse Electric Corp
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Filing: 1972-07-31
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Granted: 1974-12-03
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Expires: 1992-07-31
Abstract
Abstract A method and circuit for generating electrical pulses having a minimum of amplitude and edge jitter, particularly suited for supplying accurately timed high voltage pulses to linear beam devices utilized in radar transmitters. A first transistor is intermittently triggered into and maintained in trigger signal and returned to a non-conductive condition in response to the triggering of a second transistor into saturation by a second trigger signal. An output pulse is provided in response to the saturation and nonconducive conditions of the first transistor. A bipolar clipping circuit for pulse amplitude shaping and an arc protection circuit are also disclosed.
Inventors
- 👤 W Milberger
- 👤 D Lewns
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 18:20
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/12
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
265 words
A circuit for intermittently energizing a wave energy transmitter comprising: first and second semiconductor means each including first and second electrodes and a control electrode for controlling current flow between the first and second electrodes; means including positive signal feedback means operatively connected to the control electrode of said first semiconductor means to drive said first semiconductor means into saturation in response to the application of a first trigger signal to the control electrode of said first semiconductor means and to hold said first semiconductor means in saturation; circuit means including said second semiconductor means operatively connected to the control electrode of said first semiconductor means, said circuit means being operable to drive said first semiconductor means from saturation into a nonconductive condition in response to the application of a second trigger signal to the control electrode of said second semiconductor means; means for driving said first semiconductor means from saturation into a nonconductive condition at a predetermined time, said predetermined time being subsequent to the expected time of arrival of said second trigger signal and prior to the time when current flow in said first semiconductor means exceeds the current capacity of said first semiconductor means; and, output circuit means operatively connected to said first semiconductor means for providing a transmitter energizing signal responsively to the saturation and nonconductive conditions of the said first semiconductor means, the amplitude of said energizing signal being independent of the amplitude of said trigger signals and the duration of said energizing signal being substantially equal to the spacing between corresponding portions of said first and second trigger signals.
Claim 2
Dependent Claim
265 words
A circuit for intermittently energizing a wave energy transmitter comprising: first and second semiconductor means each including first and second electrodes and a control electrode for controlling current flow between the first and second electrodes; means including positive signal feedback means operatively connected to the control electrode of said first semiconductor means to drive said first semiconductor means into saturation in response to the application of a first trigger signal to the control electrode of said first semiconductor means and to hold said first semiconductor means in saturation; circuit means including said second semiconductor means operatively connected to the control electrode of said first semiconductor means, said circuit means being operable to drive said first semiconductor means from saturation into a nonconductive condition in response to the application of a second trigger signal to the control electrode of said second semiconductor means; means for driving said first semiconductor means from saturation into a nonconductive condition at a predetermined time, said predetermined time being subsequent to the expected time of arrival of said second trigger signal and prior to the time when current flow in said first semiconductor means exceeds the current capacity of said first semiconductor means; and, output circuit means operatively connected to said first semiconductor means for providing a transmitter energizing signal responsively to the saturation and nonconductive conditions of the said first semiconductor means, the amplitude of said energizing signal being independent of the amplitude of said trigger signals and the duration of said energizing signal being substantially equal to the spacing between corresponding portions of said first and second trigger signals.
Claim 3
Dependent Claim
106 words
The circuit of claim 1 wherein said output circuit means includes transformer means with a primary winding of said transformer means connected between one electrode of said first semiconductor means and a reference potential, the other electrode of said first semiconductor means being connected to a second reference potential; and, wherein said means for driving said first semiconductor means from saturation into a nOnconductive condition includes means for rendering said first semiconductor means nonconductive at a time prior to the time when the impedance of the primary winding of said transformer means becomes purely resistive as a result of the saturation of said first semiconductor means.
Claim 4
Dependent Claim
86 words
The circuit of claim 2 wherein said driving means includes interconnected resistance and inductance means in series between the secondary winding of said transformer means and said one electrode of said first semiconductor means, the interconnection of the said resistance and inductance means being connected to the control electrode of said first semiconductor means for clamping the control electrode of said first semiconductor means to said one electrode thereof, prior to the time that the impedance of the primary winding of said transformer becomes purely resistive.
Claim 5
Dependent Claim
69 words
The circuit of claim 1 wherein said circuit means operable to drive said first semiconductor means from saturation into a nonconductive condition includes means including said second semiconductor means for clamping the control electrode of said first semiconductor means to a potential sufficient to rapidly dissipate the charge stored by the interelectrode capacitance thereof in addition to rendering said first semiconductor means nonconducting to thereby reduce trailing edge jitter.
Claim 6
Dependent Claim
47 words
The circuit of claim 4 wherein said circuit means operable to drive said first semiconductor means from saturation into a nonconductive condition includes means for driving said second semiconductor means into saturation in response to the application of said second trigger signal to the control electrode thereof.
Claim 7
Dependent Claim
177 words
A circuit for intermittently energizing a wave energy transmitter with an output of electrical energy having a predetermined amplitude and duration comprising: a transistor connected between a first reference potential and a second reference potential, the difference in potential between the first and second reference potential being related to the desired amplitude of the output pulse; timing means for providing first and second trigger pulses spaced in accordance with the desired duration of the output pulse; means for driving said transistor into saturation and holding said transistor in saturation responsively to said first trigger pulse and means for driving said transistor into cutoff responsively to said second trigger pulse to form an output pulse at one electrode output of said transistor whereby the amplitude of said pulse is independent of trigger pulse amplitude and is limited in amplitude jitter to the jitter of the reference potentials; and, means including said means for driving said transistor into cutoff, for discharging any load energy at said one electrode output of said transistor simultaneously with driving said transistor into cutoff.
Claim 8
Dependent Claim
177 words
A circuit for intermittently energizing a wave energy transmitter with an output of electrical energy having a predetermined amplitude and duration comprising: a transistor connected between a first reference potential and a second reference potential, the difference in potential between the first and second reference potential being related to the desired amplitude of the output pulse; timing means for providing first and second trigger pulses spaced in accordance with the desired duration of the output pulse; means for driving said transistor into saturation and holding said transistor in saturation responsively to said first trigger pulse and means for driving said transistor into cutoff responsively to said second trigger pulse to form an output pulse at one electrode output of said transistor whereby the amplitude of said pulse is independent of trigger pulse amplitude and is limited in amplitude jitter to the jitter of the reference potentials; and, means including said means for driving said transistor into cutoff, for discharging any load energy at said one electrode output of said transistor simultaneously with driving said transistor into cutoff.
Claim 9
Dependent Claim
85 words
The circuit of claim 6 wherein said means for driving said transistor into cutoff includes: a second transistor connected between a control electrode of said first transistor and a third reference potential; and, means responsive to said second trigger pulse for driving said second transistor into saturation thereby to apply the third reference potential to the control electrode to drive said first transistor rapidly into cutoff by discharging the interelectrode capacitance charge thereof and to thereby reduce the trailing edge jitter of the output pulse.
Claim 10
Dependent Claim
54 words
The circuit of claim 6 wherein said means for driving said transistor into saturation includes means for maintaining said transistor in saturation for a predetermined time after the application of said trigger pulse to the control electrode thereof thereby to sustain the conduction of said transistor in the absence of said second trigger pulse.
Claim 11
Dependent Claim
73 words
The circuit of claim 8 wherein said means for maintaining the conduction of said transistor includes transformer means having a primary winding connected between an output terminal of said transistor and said second Reference potential, said transformer means having a secondary winding for applying a positive feedback signal to the control electrode of said transistor for said predetermined time interval said time interval being related to the VT characteristics of said transformer means.
Claim 12
Dependent Claim
48 words
The circuit of claim 9 and including means for removing said positive feedback signal prior to the time that the impedance of the primary winding of said transformer means becomes purely resistive thereby eliminating the inductance between the output terminal of said transistor and the second reference potential.
Claim 13
Dependent Claim
81 words
The circuit of claim 10 including resistive and inductive circuit means for shorting the control electrode of said transistor to said output terminal in a time interval less than the time interval between the application of said first trigger pulse to the control electrode of said transistor and the time that the impedance of the primary winding of said transformer means becomes purely resistive thereby to protect said transistor from damage due to failure to drive said first transistor into cutoff.
Claim 14
Dependent Claim
41 words
The circuit of claim 11 wherein the RL time constant of said resistive and inductive circuit means is longer than the expected duration of the output pulse whereby said transistor is protected against high currents without affecting output pulse waveform characteristics.
Claim 15
Dependent Claim
110 words
The circuit of claim 6 including means connected to said one electrode output for limiting the potential at said output above and below predetermined values, said limiting means including diodes connected respectively between the one electrode output and said first and second reference potentials, the forward biasing characteristics of said diodes relative to said first and second reference potentials being such that potentials at said one electrode output above and below the forward biasing characteristics of said diodes are dissipated respectively through the source for said first and second potentials, whereby said transistor is protected against arcing potentials generated by the wave energy transmitter to which said transistor is connected.
Claim 16
Dependent Claim
52 words
The circuit of claim 13 and further including Zener diode means connected between said diodes and said first and second reference potentials respectively for clipping voltage transients at said one electrode output above the forward biasing levels of said diodes and above the reverse biasing breakdown levels of said Zener diode means.
Claim 17
Dependent Claim
28 words
The circuit of claim 14 including amplifier means for varying the bias potential at the cathode electrodes of said Zener diode means to adjust the clipping levels thereof.
Claim 18
Independent Claim
290 words
A method of generating a jitter free high energy pulse for energizing a wave energy transmitter comprising the steps of: a. connecting first and second electrodes of a first transistor between first and second electrical potentials; b. connecting a second transistor connected between a control electrode of said first transistor and a third electrical potential, said third electrical potential being below a cutoff potential of said first transistor; c. providing a unidirectional current flow path between one of said first and second electrodes of said first transistor and said control electrode of said first transistor; d. driving said first transistor into saturation in response to a first trigger signal to generate a rapid change from the first potential to the second potential said one of said first and second electrodes of said first transistor; e. driving said second transistor into conduction in response to a second trigger signal subsequent to the first trigger signal to thereby apply said third electrical potential to said control electrode of said first transistor and generate a rapid change from the second electrical potential to the first electrical potential at said one of said first and second electrodes of said first transistor by discharging the interelectrode capacitance charge of the first traNsistor, said rapid change from said second potential to said first potential defining a trailing edge of an output pulse; and, f. clamping said one of said first and second electrodes of said first transistor to substantially the third electrical potential through said unidirectional current path and said second transistor in response to the second trigger signal to discharge any load energy at the second electrode of the first transistor thereby decreasing any tendency of the trailing edge of the output pulse to jitter.
Claim 19
Independent Claim
290 words
A method of generating a jitter free high energy pulse for energizing a wave energy transmitter comprising the steps of: a. connecting first and second electrodes of a first transistor between first and second electrical potentials; b. connecting a second transistor connected between a control electrode of said first transistor and a third electrical potential, said third electrical potential being below a cutoff potential of said first transistor; c. providing a unidirectional current flow path between one of said first and second electrodes of said first transistor and said control electrode of said first transistor; d. driving said first transistor into saturation in response to a first trigger signal to generate a rapid change from the first potential to the second potential said one of said first and second electrodes of said first transistor; e. driving said second transistor into conduction in response to a second trigger signal subsequent to the first trigger signal to thereby apply said third electrical potential to said control electrode of said first transistor and generate a rapid change from the second electrical potential to the first electrical potential at said one of said first and second electrodes of said first transistor by discharging the interelectrode capacitance charge of the first traNsistor, said rapid change from said second potential to said first potential defining a trailing edge of an output pulse; and, f. clamping said one of said first and second electrodes of said first transistor to substantially the third electrical potential through said unidirectional current path and said second transistor in response to the second trigger signal to discharge any load energy at the second electrode of the first transistor thereby decreasing any tendency of the trailing edge of the output pulse to jitter.
Claim 20
Independent Claim
257 words
A method of generating a jitter free high energy pulse for energizing a wave energy transmitter comprising the steps of: a. connecting a first electrode of a transistor through a load transformer to a first electrical potential and a second electrode of the transistor to a second electrical potential; b. driving the transistor into saturation in response to a first trigger signal to generate a rapid change from the first potential to the second potential at the first electrode of the transistor; c. driving the transistor into cutoff in response to a second trigger signal subsequent to the first trigger signal to generate a rapid change from the second potential to the first potential at the first electrode of the transistor by discharging the interelectrode capacitance charge of the transistor, the charge from the second to the first potential defining a trailing edge of an output pulse; d. clamping the output terminal of the transistor to substantially the second reference potential in response to the second trigger signal to discharge any load energy at the first electrode of the transistor thereby decreasing any tendency of the trailing edge of the output pulse to jitter; and, e. driving the transistor into cutoff at a predetermined time after driving the transistor into saturation upon failure of the second trigger signal to drive the transistor into cutoff, said predetermined time being subsequent to the expected time of arrival of said second trigger signal and prior to the time at which the load presented by the load transformer becomes purely resistive.
Claim 21
Independent Claim
257 words
A method of generating a jitter free high energy pulse for energizing a wave energy transmitter comprising the steps of: a. connecting a first electrode of a transistor through a load transformer to a first electrical potential and a second electrode of the transistor to a second electrical potential; b. driving the transistor into saturation in response to a first trigger signal to generate a rapid change from the first potential to the second potential at the first electrode of the transistor; c. driving the transistor into cutoff in response to a second trigger signal subsequent to the first trigger signal to generate a rapid change from the second potential to the first potential at the first electrode of the transistor by discharging the interelectrode capacitance charge of the transistor, the charge from the second to the first potential defining a trailing edge of an output pulse; d. clamping the output terminal of the transistor to substantially the second reference potential in response to the second trigger signal to discharge any load energy at the first electrode of the transistor thereby decreasing any tendency of the trailing edge of the output pulse to jitter; and, e. driving the transistor into cutoff at a predetermined time after driving the transistor into saturation upon failure of the second trigger signal to drive the transistor into cutoff, said predetermined time being subsequent to the expected time of arrival of said second trigger signal and prior to the time at which the load presented by the load transformer becomes purely resistive.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-12-02 | 1978-06-03 | 1978-12-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-12-02 | 1982-06-03 | 1982-12-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-12-02 | 1986-06-03 | 1986-12-03 | $7700.00 | Window Closed / Lapsed |