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US3850708A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating semiconductor device using at least two sorts of insulating films different from each other

Assignee: Hitachi Ltd
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Filing: 1971-10-29
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Granted: 1974-11-26
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Expires: 1991-10-29
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Abstract

Abstract A graft base transistor or the like is made by the steps of forming a first, preferably frame-shaped diffusion mask on a first base region doped with boron at an impurity concentration of 1018cm 3, using a nitrided film (Si3N4); diffusing boron at an impurity concentration of 2 X 1020cm 3 through this mask to form the second base region in the first base region; thereafter forming an oxide film (SiO2) on a region except where this mask is left; removing the remaining nitrided film and thus forming a second diffusion mask; and diffusing phosphor at an impurity concentration of 1020cm 3 through the second diffusion mask, whereby the graft base transistor has an emitter, the surface area of which is smaller than the opening area of the second diffusion mask.

Inventors

  • 👤 A Hayasaka
  • 👤 K Uehara
  • 👤 I Imaizumi
  • 👤 T Kaji

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 11:02
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/60; H10P; H10P76/00; H10P76/40; H10P95/00; H10W; H10W74/00; H10W74/40; H10W74/43; Y; Y10; Y10S; Y10S148/00; Y10S148/043; Y10S148/114

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 228 words
A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE COMPRISING THE STEPS OF: A. PREPARING A SEMICONDUCTOR SUBSTRATE; B. FORMING A FIRST INSULATING LAYER ON SAID SUBSTRATE; C. PROVIDING A FIRST MASK BY FORMING AT LEAST ONE HOLE IN SAID FIRST INSULATING LAYER, SO AS TO EXPOSE A PORTION OF THE SURFACE OF SAID SUBSTRATE; D. DIFFUSING AT LEAST ONE IMPURITY OF A FIRST CONDUCTIVITY TYPE INTO SAID SUBSTRATE THROUGH THE SURFACE THEREOF EXPOSED BY STEP (C); E. FORMING A SECOND INSULATING LAYER ON THE REMAINING PART OF SAID FIRST INSULATING LAYER AND THE EPXOSED PORTION OF THE SURFACE OF SAID SUBSTRATE, SAID SECOND INSULATING LAYER HAVING A DIFFERENT PROPERTY FROM SAID FIRST INSULATING LAYER; F. PROVIDING A SECOND MASK BY FORMING AT LEAST ONE HOLE IN SAID SECOND INSULATING LAYER WITHIN AN AREA THEREOF DELIMITED BY THE HOLE OF SAID FIRST MASK WHICH EXPOSES SAID PORTION OF THE SURFACE OF SAID SUBSTRATE, SO AS TO EXPOSE A PART OF THE SURFACE OF SAID SUBSTRATE; G. DIFFUSING AT LEAST ONE IMPURITY OF A SECOND CONDUCIVITY TYPE INTO SAID SUBSTRATE THROUGH THE SURFACE THEREOF EXPOSED BY STEP (F); H. FORMING ANOTHER HOLE IN SAID SECOND INSULATING LAYER, SAID HOLE BEING DELIMITED PARTLY BY THE EDGE OF THE HOLE OF SAID FIRST MASK, AND I. FORMING A METAL LAYER ON THE PORTION OF THE SURFACE OF SAID SUBSTRATE EXPOSED BY STEP (H).
Claim 2
Independent Claim 228 words
A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE COMPRISING THE STEPS OF: A. PREPARING A SEMICONDUCTOR SUBSTRATE; B. FORMING A FIRST INSULATING LAYER ON SAID SUBSTRATE; C. PROVIDING A FIRST MASK BY FORMING AT LEAST ONE HOLE IN SAID FIRST INSULATING LAYER, SO AS TO EXPOSE A PORTION OF THE SURFACE OF SAID SUBSTRATE; D. DIFFUSING AT LEAST ONE IMPURITY OF A FIRST CONDUCTIVITY TYPE INTO SAID SUBSTRATE THROUGH THE SURFACE THEREOF EXPOSED BY STEP (C); E. FORMING A SECOND INSULATING LAYER ON THE REMAINING PART OF SAID FIRST INSULATING LAYER AND THE EPXOSED PORTION OF THE SURFACE OF SAID SUBSTRATE, SAID SECOND INSULATING LAYER HAVING A DIFFERENT PROPERTY FROM SAID FIRST INSULATING LAYER; F. PROVIDING A SECOND MASK BY FORMING AT LEAST ONE HOLE IN SAID SECOND INSULATING LAYER WITHIN AN AREA THEREOF DELIMITED BY THE HOLE OF SAID FIRST MASK WHICH EXPOSES SAID PORTION OF THE SURFACE OF SAID SUBSTRATE, SO AS TO EXPOSE A PART OF THE SURFACE OF SAID SUBSTRATE; G. DIFFUSING AT LEAST ONE IMPURITY OF A SECOND CONDUCIVITY TYPE INTO SAID SUBSTRATE THROUGH THE SURFACE THEREOF EXPOSED BY STEP (F); H. FORMING ANOTHER HOLE IN SAID SECOND INSULATING LAYER, SAID HOLE BEING DELIMITED PARTLY BY THE EDGE OF THE HOLE OF SAID FIRST MASK, AND I. FORMING A METAL LAYER ON THE PORTION OF THE SURFACE OF SAID SUBSTRATE EXPOSED BY STEP (H).
Claim 3
Dependent Claim 64 words
A method of fabricating a semiconductor device according to claim 1, wherein both said insulating layers are SiO2 films, said SiO2 film formed during step (b) being formed by a thermal oxidation process in an oxidizing atmosphere at about 800*C to about 1,200*C, and said SiO2 film formed during step (e) being formed by a chemical deposition process using the thermal decomposition of silane.
Claim 4
Independent Claim 382 words
A method of fabricating a semiconductor device comprising the steps of: a. forming a first layer of insulating material directly on the surface of a semiconductor substrate, said first layer of insulating material having a first etching speed with respect to a prescribed etchant; b. forming a first hole through said first layer of insulating material to the surface to said substrate, to expose a first surface portion of said substrate; c. introducing a first impurity of a first conductivity type through said hole into the exposed surface portion of said substrate; d. forming a second layer of insulating material directly on the surface of said first layer of insulating material and on the exposed surface of said substrate into which said first impurity has been introduced by step (c), said second layer of insulating material having a second etching speed with respect to said prescribed etchant, said second etching speed being faster than said first etching speed; e. forming a first hole through a first portion of said second layer of insulating material which is disposed within the first hole provided through said first layer of insulating material, so as to expose a second surface portion of said substrate within the confines of the surface thereof into which said first impurity has been introduced; f. introducing a second impurity of a second conductivity type, opposite said first conductivity type, through the first hole in said second layer of insulating material into said second surface portion of said substrate; g. forming a second hole through a second portion of said second layer of insulating material which is disposed within the first hole provided through said first layer of insulating material, so as to expose a third surface portion of said substrate spaced apart from said second surface portion of said substrate and adjacent said first layer of insulating material at the confines of the first hole therethrough, within the confines of the surface thereof into which said first impurity has been introduced, by selectively applying said prescribed etchant to that portion of said second layer of insulating material substantially overlying said third surface portion of said substrate; and h. forming a metal layer on said third surface portion of said substrate through said second hole through said second layer of insulating material.
Claim 5
Independent Claim 382 words
A method of fabricating a semiconductor device comprising the steps of: a. forming a first layer of insulating material directly on the surface of a semiconductor substrate, said first layer of insulating material having a first etching speed with respect to a prescribed etchant; b. forming a first hole through said first layer of insulating material to the surface to said substrate, to expose a first surface portion of said substrate; c. introducing a first impurity of a first conductivity type through said hole into the exposed surface portion of said substrate; d. forming a second layer of insulating material directly on the surface of said first layer of insulating material and on the exposed surface of said substrate into which said first impurity has been introduced by step (c), said second layer of insulating material having a second etching speed with respect to said prescribed etchant, said second etching speed being faster than said first etching speed; e. forming a first hole through a first portion of said second layer of insulating material which is disposed within the first hole provided through said first layer of insulating material, so as to expose a second surface portion of said substrate within the confines of the surface thereof into which said first impurity has been introduced; f. introducing a second impurity of a second conductivity type, opposite said first conductivity type, through the first hole in said second layer of insulating material into said second surface portion of said substrate; g. forming a second hole through a second portion of said second layer of insulating material which is disposed within the first hole provided through said first layer of insulating material, so as to expose a third surface portion of said substrate spaced apart from said second surface portion of said substrate and adjacent said first layer of insulating material at the confines of the first hole therethrough, within the confines of the surface thereof into which said first impurity has been introduced, by selectively applying said prescribed etchant to that portion of said second layer of insulating material substantially overlying said third surface portion of said substrate; and h. forming a metal layer on said third surface portion of said substrate through said second hole through said second layer of insulating material.
Claim 6
Dependent Claim 61 words
A method of fabricating a semiconductor device according to claim 3, wherein said step (a) comprises the step of thermally oxidizing a silicon substrate in an oxidizing atmosphere at about 800*C to about 1,200*C, and said step (d) comprises the step of forming an insulating layer of silicon dioxide by a chemical vapor deposition process through the thermal decomposition of silane.

References Cited (Backward Citations)

US3326729A Cited
US3342650A Cited
DE1614375A1 Cited
US3544399A Cited
US3537921A Cited
US3475234A Cited
US3576478A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-11-25 1978-05-27 1978-11-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-11-25 1982-05-27 1982-11-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-11-25 1986-05-27 1986-11-26 $7700.00 Window Closed / Lapsed

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