US3848160A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for detecting phase unbalance in a three phase supply
Assignee: General Electric Canada Co
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Filing: 1973-05-21
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Granted: 1974-11-12
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Expires: 1993-05-21
Abstract
Abstract According to the invention an AC voltage, which is a function of line current, is obtained from each line of a three phase AC source. A half-wave rectifier converts the three AC voltages into three trains of pulses of like polarity. Two different ones of the three trains of pulses are applied to the two inputs of each one of three differential integrating circuits. Each circuit integrates the difference of its inputs and gives an output voltage which is proportional to this difference. The voltages of one polarity are selected from the outputs of the three differential integrating circuits and summed. The level of this sum represents the current imbalance of the source. A level detector may be used to detect this voltage level and initiate a control function in response to a predetermined level. A time delay will usually be provided to delay the control function.
Inventors
- 👤 D Boothman
- 👤 D Nutt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 16:50
CPC Classifications
H; H02; H02H; H02H3/00; H02H3/26; H02H3/32; H02H3/34
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
109 words
A circuit for detecting the largest of three electric signals of like polarity comprising three differential integrating circuits, each circuit having two inputs and one output; means for applying two different ones of said three signals to the respective inputs of each integrating circuit, each one of said integrating circuits integrating the difference between its input signals and giving an output signal proportional to this difference; means for selecting signals of the same polarity from said output signals; means for summing all said selected signals and outputting a voltage representative of the algebraic sum thereof; and means for detecting the signal level of the sum of said selected signals.
Claim 2
Dependent Claim
109 words
A circuit for detecting the largest of three electric signals of like polarity comprising three differential integrating circuits, each circuit having two inputs and one output; means for applying two different ones of said three signals to the respective inputs of each integrating circuit, each one of said integrating circuits integrating the difference between its input signals and giving an output signal proportional to this difference; means for selecting signals of the same polarity from said output signals; means for summing all said selected signals and outputting a voltage representative of the algebraic sum thereof; and means for detecting the signal level of the sum of said selected signals.
Claim 3
Dependent Claim
38 words
The circuit defined in claim 1 characterized by the provision of time delay means between said summing means and said level detecting means for delaying detection of said summed signals subsequent to the initial energization of said circuit.
Claim 4
Dependent Claim
55 words
The circuit defined in claim 1 wherein each one of said differential integrating circuits comprises an operational amplifier and capacitance means connected in the configuration of a differential integrator; and resistance means in parallel with said capacitance means for limiting the output of said amplifier to a value proportional to the difference of its inputs.
Claim 5
Dependent Claim
29 words
The circuit defined in claim 3 wherein said circuit includes means for obtaining said three electric signals from a three phase AC source as functions of the currents therein.
Claim 6
Dependent Claim
53 words
The circuit defined in claim 3 wherein said circuit includes means for obtaining said three electric signals from a three phase AC source as functions of the currents therein, and also means for initiating a control function in response to the detection of a certain signal level by said signal level detecting means.
Claim 7
Dependent Claim
180 words
A circuit for detecting current imbalance in a three phase AC source comprising current-into-voltage transducing means for each phase line of said source for producing an AC voltage that is a function of the line current; half-wave rectifying means for converting the three AC voltages into three trains of pulses of like polarity; three differential integrating circuits, each circuit having two inputs and one output; means for applying two different ones of said three trains of pulses to the respective inputs of each integrating circuit, each one of said integrating circuits integrating the difference between its inputs and giving a DC output proportional to this difference; half-wave rectifying means for converting the DC outputs from said integrating circuits into DC signals of like polarity; means for summing said DC signals; means for detecting the level of the sum of said DC signals and initiating a control function at a predetermined value of said level; and time delay means connected to the output of said summing means and to said level detecting means for delaying the initiation of said control function.
Claim 8
Dependent Claim
180 words
A circuit for detecting current imbalance in a three phase AC source comprising current-into-voltage transducing means for each phase line of said source for producing an AC voltage that is a function of the line current; half-wave rectifying means for converting the three AC voltages into three trains of pulses of like polarity; three differential integrating circuits, each circuit having two inputs and one output; means for applying two different ones of said three trains of pulses to the respective inputs of each integrating circuit, each one of said integrating circuits integrating the difference between its inputs and giving a DC output proportional to this difference; half-wave rectifying means for converting the DC outputs from said integrating circuits into DC signals of like polarity; means for summing said DC signals; means for detecting the level of the sum of said DC signals and initiating a control function at a predetermined value of said level; and time delay means connected to the output of said summing means and to said level detecting means for delaying the initiation of said control function.
Claim 9
Dependent Claim
23 words
The circuit defined in claim 5 wherein said circuit includes means for limiting the amplitude of the pulses of said trains of pulses.
Claim 10
Dependent Claim
61 words
The circuit defined in claim 6 wherein said time delay means comprises a current sink and a capacitor-resistor circuit, said capacitor receiving charge from a DC source and supplying current to said sink, the magnitude of said current supplied to said sink being controlled by the sum of said DC signals, and said level detector detecting the voltage on said capacitor.
Claim 11
Dependent Claim
55 words
The circuit defined in claim 6 wherein each one of said differential integrating circuits comprises an operational amplifier and capacitance means connected in the configuration of a differential integrator; and resistance means in parallel with said capacitance means for limiting the output of said amplifier to a value proportional to the difference of its inputs.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-11-11 | 1978-05-13 | 1978-11-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-11-11 | 1982-05-13 | 1982-11-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-11-11 | 1986-05-13 | 1986-11-12 | $7700.00 | Window Closed / Lapsed |