Pulse amplitude evaluation

Claim 2

In a method for evaluating the amplitudes of pulses having a range of peak amplitudes, which exceed a given amplitude, the method including detecting each apparent pulse amplitude maximum, storing intermediately in a pulse stretcher an analog signal representing the maximum amplitude of a pulse, and subsequently converting the stored signal into a digital signal, the improvement comprising: electronically monitoring the pulse waveform for a given period of time after detection of an apparent pulse maximum amplitude; and electronically suppressing the utilization of the associated digital signal whenever said step of monitoring reveals that during the given period of time the amplitude of the pulse is increasing, which indicates that the registered maximum was an intermediate maximum caused by noise signals.

Claim 3

A method as defined in claim 1, wherein said step of suppressing is carried out by blocking transfer of the digital signal.

Claim 4

A method as defined in claim 1, wherein said step of suppressing is carried out by blocking evaluation of the digital signal.

Claim 5

A method as defined in claim 1 further comprising supplying pulses to be evaluated having widely varying amplitudes, at least some of the pulses having high amplitudes and initial gradual slopes at least in their lower partial range.

Claim 6

A method as defined in claim 1, wherein said monitoring step takes place for a period of time substantially equal to the period of time required for a pulse of high amplitude to reach its lowest possible level after that point in time at which its maximum occurs.

Claim 7

A method as defined in claim 1, wherein said monitoring step incLudes comparing the amplitude of said analog signal with the current amplitude of said pulse signal, and said suppressing step is effected whenever said pulse signal exceeds said analog signal.

Claim 8

A method as defined in claim 1, wherein said monitoring step comprises determining whether said pulse is below said given amplitude, after a maximum has been registered at the end of a given time period.

Claim 9

A method as defined in claim 1, comprising the further step of supplying pulses from a pulse source constituted by a particle detector.

Claim 10

A method as defined in claim 1 further comprising the step of temporarily storing each digital signal until the end of the monitoring of its associated pulse.

Claim 11

A method as defined in claim 1 wherein said step of monitoring is carried out for a period of time independent of the time during which the pulse exceeds the given amplitude.

Claim 12

A circuit for evaluating the amplitude of pulses from a pulse source, the pulses having a range of peak amplitudes, which exceed a given amplitude, the circuit comprising, in combination: a. pulse stretching means coupled to the pulse source and responsive to its individual output pulses for intermediately storing an analog signal representative of the maximum amplitude of the individual pulses; b. analog/digital converter means coupled to said pulse stretching means and responsive to the analog signal stored therein for developing a digital signal representative of the maximum amplitude of each individual pulse; c. controllable means coupled to said analog/digital converter means and responsive to the digital signal developed therein for selectively passing the digital signal, said controllable means having a control signal input means; and d. means operatively coupled to said pulse source and responsive to the behavior of its individual output pulses during a given period of time subsequent to the determination of an occurrence of a maximum pulse amplitude for producing a control signal whenever the currently present pulse is increasing in amplitude during the given period of time, e. said control signal input means of said controllable means being coupled to said means for producing a control signal and responsive to the control signals produced therein for suppressing the passage of the digital signal through said controllable means whenever such control signal appears.

Claim 13

A circuit for evaluating the amplitude of pulses from a pulse source, the pulses having a range of peak amplitudes, which exceed a given amplitude, the circuit comprising, in combination: a. pulse stretching means coupled to the pulse source and responsive to its individual output pulses for intermediately storing an analog signal representative of the maximum amplitude of the individual pulses; b. analog/digital converter means coupled to said pulse stretching means and responsive to the analog signal stored therein for developing a digital signal representative of the maximum amplitude of each individual pulse; c. controllable means coupled to said analog/digital converter means and responsive to the digital signal developed therein for selectively passing the digital signal, said controllable means having a control signal input means; and d. means operatively coupled to said pulse source and responsive to the behavior of its individual output pulses during a given period of time subsequent to the determination of an occurrence of a maximum pulse amplitude for producing a control signal whenever the currently present pulse is increasing in amplitude during the given period of time, e. said control signal input means of said controllable means being coupled to said means for producing a control signal and responsive to the control signals produced therein for suppressing the passage of the digital signal through said controllable means whenever such control signal appears.

Claim 14

A circuit for evaluating the amplitude of pulses from a pulse source, the pulses having a range of peak amplitudes which exceed a given amplitude, the circuit comprising, in combination; a. linear gate means having signal input means for receiving pulses from the pulse source, control signal input means and output means; b. pulse stretching means coupled to said output means of said linear gate means and responsive to its output signals for intermediately storing the maximum amplitude of individual pulses passed by said linear gate means, said pulse stretching means having control input means; c. analog/digital converter means having its signal input means coupled to said pulse stretcher means for converting the stored signals representing maximum pulse amplitudes into digitial signals, said analog/digital converter means having a START input means and a READY output means; d. digital gate means coupled to said analog/digital converter means for selectively passing digitial signals received therefrom, said digitial gate means having a control input means; e. digital memory means coupled to said digital gate means for storing digital signals received therefrom; f. means operatively couplable to the pulse source and responsive to its pulse signals for producing an output signal indicative of the time of occurrence of each pulse maximum; g. added gate means coupled to said means for producing an output signal for selectively passing signals received therefrom indicative of the times of occurrence of pulse maximums, said gate means having a control iNput means; h. means operatively couplable to the pulse source and responsive to its pulse signals for producing a threshold signal indicative of receipt of any signal in excess of a given minimum threshold level; i. means for coupling said control input means of said added gate means to said means for producing a threshold signal for controlling passage of the signals indicative of the times of occurrence of pulse maximums; j. means for coupling said START input means of said analog/digital converter means to said added gate means for receiving signals passed therefrom to initiate conversion; k. bistable flip-flop means having a first input means coupled to said added gate means and responsive to signals there-from, and a second input means coupled to said READY output means of said analog/digital converter means and responsive to signals therefrom for producing a control signal upon receipt of a READY signal from said READY output means; l. means for coupling said control input means of said linear gate means to said bistable flip-flop means for selectively enabling said linear gate means by the control signal from said bistable flip-flop means; m. means for coupling said control input means of said pulse stretching means to said READY output means of said analog/digital converter means for resetting said pulse stretching means upon receipt of a READY signal from said converter means; n. discriminator circuit means for determining the behavior of individual output pulses from the pulse source during a given period of time subsequent to the determination of the occurrence of a pulse maximum and for developing a control signal, said discriminator means having a first input means for receiving signals from the pulse source and a second input means coupled to said added gate means for receiving signals passed therethrough; and o. means coupling said control input means of said digital gate means to said discriminator circuit means for controlling passage of signals through said digital gate means in response to control signals from said discriminator circuit means.

Claim 15

A circuit for evaluating the amplitude of pulses from a pulse source, the pulses having a range of peak amplitudes which exceed a given amplitude, the circuit comprising, in combination; a. linear gate means having signal input means for receiving pulses from the pulse source, control signal input means and output means; b. pulse stretching means coupled to said output means of said linear gate means and responsive to its output signals for intermediately storing the maximum amplitude of individual pulses passed by said linear gate means, said pulse stretching means having control input means; c. analog/digital converter means having its signal input means coupled to said pulse stretcher means for converting the stored signals representing maximum pulse amplitudes into digitial signals, said analog/digital converter means having a START input means and a READY output means; d. digital gate means coupled to said analog/digital converter means for selectively passing digitial signals received therefrom, said digitial gate means having a control input means; e. digital memory means coupled to said digital gate means for storing digital signals received therefrom; f. means operatively couplable to the pulse source and responsive to its pulse signals for producing an output signal indicative of the time of occurrence of each pulse maximum; g. added gate means coupled to said means for producing an output signal for selectively passing signals received therefrom indicative of the times of occurrence of pulse maximums, said gate means having a control iNput means; h. means operatively couplable to the pulse source and responsive to its pulse signals for producing a threshold signal indicative of receipt of any signal in excess of a given minimum threshold level; i. means for coupling said control input means of said added gate means to said means for producing a threshold signal for controlling passage of the signals indicative of the times of occurrence of pulse maximums; j. means for coupling said START input means of said analog/digital converter means to said added gate means for receiving signals passed therefrom to initiate conversion; k. bistable flip-flop means having a first input means coupled to said added gate means and responsive to signals there-from, and a second input means coupled to said READY output means of said analog/digital converter means and responsive to signals therefrom for producing a control signal upon receipt of a READY signal from said READY output means; l. means for coupling said control input means of said linear gate means to said bistable flip-flop means for selectively enabling said linear gate means by the control signal from said bistable flip-flop means; m. means for coupling said control input means of said pulse stretching means to said READY output means of said analog/digital converter means for resetting said pulse stretching means upon receipt of a READY signal from said converter means; n. discriminator circuit means for determining the behavior of individual output pulses from the pulse source during a given period of time subsequent to the determination of the occurrence of a pulse maximum and for developing a control signal, said discriminator means having a first input means for receiving signals from the pulse source and a second input means coupled to said added gate means for receiving signals passed therethrough; and o. means coupling said control input means of said digital gate means to said discriminator circuit means for controlling passage of signals through said digital gate means in response to control signals from said discriminator circuit means.

Claim 16

A circuit as defined in claim 12, wherein said disciminator circuit means further has third input means coupled to said pulse stretcher for receiving signals there-from and comprises: comparator means having two input means constituted respectively by said first and third input means of said discriminator circuit means for producing an output signal representing the difference between the signals received in its two input means; limiting amplifier means coupled to said comparator means and responsive to its output signal for producing a limited output signal; monostable multivibrator means having an input constituted by said second input means of said discriminator circuit means for producing an output pulse signal having a given duration (T1) in response to each signal received at its input; differentiating circuit means coupled to said monostable multivibrator means for differentiating the trailing edges of the pulse signal therefrom; further gate means having a signal input means coupled to said differentiating circuit means and a control input means coupled to said limiting amplifier means for selectively passing differentiated signals received from said differentiating circuit means under the control of the limited output signal received from said limiting amplifier means; and bistable multivibrator means having a first input means coupled to said further gate means and a second input means coupled to said added gate means for producing the control signals of said discriminator circuit means which control said digital gate means.

Claim 17

A circuit as defined in claim 12, wherein said discriminator circuit means comprises; circuit means responsive to signals from the pulse source for producing a threshold output signal in response to receipt of signals exceeding a given minimum level; monostable multivibratOr means coupled to said added gate means and responsive to signals passed thereby for producing a pulse signal of given duration (T2) in response to each received signal; differentiating circuit means coupled to said monostable multivibrator means for differentiating the trailing edge of the pulses received therefrom; further gate means having its signal input means coupled to said differentiating circuit means and its control input means coupled to said circuit means for producing threshold output signals for selectively passing signals from said differentiating circuit means; and bistable multivibrator means having a first input means coupled to said further gate means and a second input means coupled to said added gate means for producing the control signals of said discriminator circuit means which control said digital gate means.