US3842414A
Expired / Lapsed
US
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Binary coded decimal conversion apparatus
Assignee: International Business Machines Corp
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Filing: 1973-06-18
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Granted: 1974-10-15
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Expires: 1993-06-18
Abstract
Abstract Apparatus for encoding multi-digit binary-coded-decimal numbers of a predetermined quantity of bits, for example, of at least two decimal digits, into a re-expressed lower number of bits, the binary-coded-decimal number being expressed in the form (abcd) (efgh). An encoder selects a set from a class of sets of bit symbols with each set corresponding to a respective combination of the bits in the most significant position, (a) and (e), of each of the four-bit groups representing the respective digits of the binary-coded-decimal number to be encoded. The selected set is the set which corresponds to the respective combination and the encoder determines certain of the bits of the multi-digit binary-coded-decimal number to be encoded and leaves undetermined the remaining bits of the number. The encoder is connected to register means having a plurality of bit positions which are equal to the quantity of bits less than the predetermined quantity, and stores not only the determined bit symbols but also the undetermined other bits of the multi-digit binary-codeddecimal number.
Inventors
- 👤 T Chen
- 👤 I Ho
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 20:04
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/02; H03M7/12
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
189 words
Apparatus for encOding multidigit binary-coded-decimal numbers, each of a predetermined first quantity of bits, into encoded numbers each having a second quantity of bits less than said predetermined quantity, said apparatus comprising: means for selecting a set from a class of sets of bit symbols with each set corresponding to a respective combination of the bits in the most significant position of each of the four-bit groups representing the respective digits of the binary-coded-decimal number to be encoded; said selected set being the set corresponding to said respective combination and determining certain of the bits of the multi-digit binary-coded-decimal number to be encoded and leaving undetermined the other bits of said multi-digit binary-codeddecimal number to be encoded; register means having a plurality of bit positions equal to said second quantity, means for transmitting said bit symbols of said selected set to respective predetermined positions in said register means, and means for transmitting said undetermined other bits of said multi-digit binary-coded-decimal number to other respective predetermined positions in said register means, whereby said register means will store an encoded number representing and having fewer bits than said multi-digit binary-coded-decimal number.
Claim 2
Dependent Claim
189 words
Apparatus for encOding multidigit binary-coded-decimal numbers, each of a predetermined first quantity of bits, into encoded numbers each having a second quantity of bits less than said predetermined quantity, said apparatus comprising: means for selecting a set from a class of sets of bit symbols with each set corresponding to a respective combination of the bits in the most significant position of each of the four-bit groups representing the respective digits of the binary-coded-decimal number to be encoded; said selected set being the set corresponding to said respective combination and determining certain of the bits of the multi-digit binary-coded-decimal number to be encoded and leaving undetermined the other bits of said multi-digit binary-codeddecimal number to be encoded; register means having a plurality of bit positions equal to said second quantity, means for transmitting said bit symbols of said selected set to respective predetermined positions in said register means, and means for transmitting said undetermined other bits of said multi-digit binary-coded-decimal number to other respective predetermined positions in said register means, whereby said register means will store an encoded number representing and having fewer bits than said multi-digit binary-coded-decimal number.
Claim 3
Dependent Claim
21 words
Apparatus in accordance with claim 1 including memory means for storing said second quantity of bits less than said predetermined quantity.
Claim 4
Dependent Claim
51 words
Apparatus in accordance with claim 2 including second register means connected to said memory means for receiving said second quantity of bits less than said predetermined quantity from said memory means, and means for decoding said second quantity of bits to provide a binary-coded-decimal number output corresponding to said encoded number.
Claim 5
Dependent Claim
129 words
Apparatus for compressing binary-coded-decimal numbers of at least two decimal digits, into a re-expressed lower number of bits, said binary-coded-decimal number being expressed in the form abcd,efgh, said apparatus comprising: encoding means for selecting a set from a class of sets of bit symbols representative of the state of the bits a and e, and encoding at least the bit symbols b, c and f, g in accordance with said sets selected; register means having a plurality of bit positions equal to said lower number of bits, and means to transmit said selected set of bit symbols to said register means from said encoding means and said encoded bit symbols b, c and f, g; and means to transmit to said register means, said binary-coded-decimal bits d and h.
Claim 6
Dependent Claim
129 words
Apparatus for compressing binary-coded-decimal numbers of at least two decimal digits, into a re-expressed lower number of bits, said binary-coded-decimal number being expressed in the form abcd,efgh, said apparatus comprising: encoding means for selecting a set from a class of sets of bit symbols representative of the state of the bits a and e, and encoding at least the bit symbols b, c and f, g in accordance with said sets selected; register means having a plurality of bit positions equal to said lower number of bits, and means to transmit said selected set of bit symbols to said register means from said encoding means and said encoded bit symbols b, c and f, g; and means to transmit to said register means, said binary-coded-decimal bits d and h.
Claim 7
Dependent Claim
26 words
Apparatus for compressing binary-coded-decimal numbers in accordance with claim 4 wherein said encoding means comprises an array logic encoder comprised of current switch emitter follower circuits.
Claim 8
Dependent Claim
19 words
Apparatus for compressing binary-coded-decimal numbers in accordance with claim 4 wherein said encoding means comprises a random logic circuit.
Claim 9
Dependent Claim
45 words
Apparatus for compressing binary-coded-decimal numbers in accordance with claim 4 wherein said re-expressed lower number of bits takes the form of UVWdXYh, and wherein said re-expressed bit symbols d and h are the same as the bit symbols d and h in the binary-coded-decimal number.
Claim 10
Dependent Claim
40 words
Apparatus for compressing binary-coded-decimal numbers in accordance with claim 4 wherein said re-expressed lower number of bits takes the form of UVWdXYh, and including logic means in said encoder for determining the bit symbol U by ORing e and a.
Claim 11
Dependent Claim
28 words
Apparatus for compressing binary-coded-decimal numbers in accordance with claim 8 including further logic means in said encoder for determining said bit symbol V by ORing e and b.
Claim 12
Dependent Claim
25 words
Apparatus for compressing binary-coded-decimal numbers in accordance with claim 4 wherein said encoding means includes random logic circuits in the form of a read-only memory.
Claim 13
Dependent Claim
25 words
Apparatus for compressing binary-coded-decimal numbers in accordance with claim 4 wherein said encoding means cOmprises an array logic encoder including current switch emitter follower circuits.
Claim 14
Dependent Claim
132 words
Apparatus for compressing binary-coded-decimal numbers of at least three decimal digits, into a re-expressed lower number of bits, said binary-coded-decimal number being in the form abcd, efgh, ijkl, said apparatus comprising: encoding means for selecting a set from a class of sets of bit symbols representative of the state of the bits a, e, and i an encoding at least the bit symbols bc, fg, and jk in accordance with said sets selected; register means having a plurality of bit positions equal to said lower number of bits, and means to transmit said selected set of bit symbols to said register means from said encoding means and said encoded bit symbols b, c, f, g, j, k; and means to transmit to said register means, said binary-coded-decimal bits d, h, and l.
Claim 15
Dependent Claim
132 words
Apparatus for compressing binary-coded-decimal numbers of at least three decimal digits, into a re-expressed lower number of bits, said binary-coded-decimal number being in the form abcd, efgh, ijkl, said apparatus comprising: encoding means for selecting a set from a class of sets of bit symbols representative of the state of the bits a, e, and i an encoding at least the bit symbols bc, fg, and jk in accordance with said sets selected; register means having a plurality of bit positions equal to said lower number of bits, and means to transmit said selected set of bit symbols to said register means from said encoding means and said encoded bit symbols b, c, f, g, j, k; and means to transmit to said register means, said binary-coded-decimal bits d, h, and l.
Claim 16
Dependent Claim
145 words
Apparatus for compressing binary-coded-decimal numbers of at least two decimal digits into a re-expressed lower number of bit symbols, said apparatus comprising: encoding means for selecting a set of bit symbols from a class of sets of bit symbols, each set corresponding to the state of the most significant bit position of the binary-coded-decimal number to be encoded and for determining certain of the bits of the multi-digit, binary-coded-decimal number to be encoded; register means having a plurality of bit positions equal to said re-expressed lower number of bit symbols, means connecting said register means to said encoding means for receiving bit symbols of said selected set of bit symbols and storing the same in a predetermined position therein; and for receiving bit symbols from said binary-coded-decimal number which are less significant than the most significant bit in other predetermined positions in said register means.
Claim 17
Dependent Claim
145 words
Apparatus for compressing binary-coded-decimal numbers of at least two decimal digits into a re-expressed lower number of bit symbols, said apparatus comprising: encoding means for selecting a set of bit symbols from a class of sets of bit symbols, each set corresponding to the state of the most significant bit position of the binary-coded-decimal number to be encoded and for determining certain of the bits of the multi-digit, binary-coded-decimal number to be encoded; register means having a plurality of bit positions equal to said re-expressed lower number of bit symbols, means connecting said register means to said encoding means for receiving bit symbols of said selected set of bit symbols and storing the same in a predetermined position therein; and for receiving bit symbols from said binary-coded-decimal number which are less significant than the most significant bit in other predetermined positions in said register means.
Claim 18
Dependent Claim
26 words
Apparatus in accordance with claim 13 including means for decoding said second quantity of bits to provide a binary-coded-decimal number output corresponding to said encoded number.
References Cited (Backward Citations)
US3432811A
Cited
US3618047A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-10-14 | 1978-04-15 | 1978-10-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-10-14 | 1982-04-15 | 1982-10-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-10-14 | 1986-04-15 | 1986-10-15 | $7700.00 | Window Closed / Lapsed |