US3842355A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Signal processing circuit for wheel slip control systems
Assignee: Echlin Inc
•
Filing: 1973-03-13
•
Granted: 1974-10-15
•
Expires: 1993-03-13
Abstract
Abstract A signal processing circuit for use in skid control systems to vary the pressure applied to fluid controlled brake actuating mechanisms upon detection of a predetermined threshold of wheel deceleration, and upon detection of a subsequent, predetermined decrease in wheel rotational velocity. A signal proportional to the velocity of a selected wheel is received and process to develop a signal proportional to the rate of change of velocity of the selected wheel, and these signals are employed to control the sequence and duration of the energization and de-energization of solenoid valves in a modulator valve assembly. The incremental decrease in wheel velocity from the time said deceleration threshold is reached, at which time a first solenoid valve is energized to effect a gradual reduction in brake line fluid pressure, is monitored to determine when a variable reference increment of wheel speed Delta v has been exceeded, at which time a second solenoid valve is energized to effect a sharp reduction in brake line fluid pressure. The variable reference increment of wheel speed Delta v is defined by the value of wheel velocity at the time said deceleration threshold is reached and by a variable reference signal which is directly related to the rate of change of wheel speed. The magnitude of Delta v is inversely related to the magnitude of the variable reference signal, thereby shortening the period of time between the gradual and sharp reductions in brake line fluid pressure when velocity decreases very rapidly upon the application of braking force.
Inventors
- 👤 J Fleagle
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 15:20
CPC Classifications
B; B60; B60T; B60T8/00; B60T8/17; B60T8/176; B60T8/1763; B60T8/17633; B60T8/32; B60T8/34; B60T8/36; B60T8/361; G; G01; G01P; G01P1/00; G01P1/07; G01P1/08; G01P1/10; G01P1/103; G01P15/00; G01P15/02; G01P15/08; G01P15/0891; G01P15/16; G01P3/00; G01P3/42; G01P3/56
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
113 words
A signal-processing circuit comprising: 1. first circuit means operative to receive an input signal and to generate a signal representative of the first derivative of said input signal, and further operative to generate a first variable-width pulse whenever said signal representative of the first derivative of said input signal exceeds a first reference signal; and 2. second circuit means operative to receive said input signal, said signal representative of the first derivative of said input signal, and said first variable-width pulse from said first circuit means, and further operative to generate a seCond variable-width pulse whenever said input signal falls below a second, variable reference signal after initiation of said first variable-width pulse.
Claim 2
Dependent Claim
113 words
A signal-processing circuit comprising: 1. first circuit means operative to receive an input signal and to generate a signal representative of the first derivative of said input signal, and further operative to generate a first variable-width pulse whenever said signal representative of the first derivative of said input signal exceeds a first reference signal; and 2. second circuit means operative to receive said input signal, said signal representative of the first derivative of said input signal, and said first variable-width pulse from said first circuit means, and further operative to generate a seCond variable-width pulse whenever said input signal falls below a second, variable reference signal after initiation of said first variable-width pulse.
Claim 3
Dependent Claim
57 words
second circuit means operative to receive said input signal, said signal representative of the first derivative of said input signal, and said first variable-width pulse from said first circuit means, and further operative to generate a seCond variable-width pulse whenever said input signal falls below a second, variable reference signal after initiation of said first variable-width pulse.
Claim 4
Dependent Claim
57 words
second circuit means operative to receive said input signal, said signal representative of the first derivative of said input signal, and said first variable-width pulse from said first circuit means, and further operative to generate a seCond variable-width pulse whenever said input signal falls below a second, variable reference signal after initiation of said first variable-width pulse.
Claim 5
Dependent Claim
27 words
The circuit according to claim 1 wherein said second, variable reference signal is directly related to said first derivative of said signal representative of the input signal.
Claim 6
Dependent Claim
45 words
second threshold circuit means operative in response to the output of said gating circuit means to compare said input signal to said second, variable reference signal and to generate said second variable-width pulse whenever said input signal falls below said second, variable reference signal; and
Claim 7
Dependent Claim
45 words
second threshold circuit means operative in response to the output of said gating circuit means to compare said input signal to said second, variable reference signal and to generate said second variable-width pulse whenever said input signal falls below said second, variable reference signal; and
Claim 8
Dependent Claim
23 words
first threshold circuit means operative to generate said first variable-width pulse whenever the output of said differentiator means exceeds said first reference signal.
Claim 9
Dependent Claim
23 words
first threshold circuit means operative to generate said first variable-width pulse whenever the output of said differentiator means exceeds said first reference signal.
Claim 10
Dependent Claim
21 words
fourth circuit means operative to generate a second output in response to the coincidence of said first and second variable-width pulses.
Claim 11
Dependent Claim
21 words
fourth circuit means operative to generate a second output in response to the coincidence of said first and second variable-width pulses.
Claim 12
Dependent Claim
36 words
variable reference signal generator means operative to receive said signal representative of the first derivative of said input signal from said differentiator means and to provide second, variable reference signal to said second threshold circuit means.
Claim 13
Dependent Claim
36 words
variable reference signal generator means operative to receive said signal representative of the first derivative of said input signal from said differentiator means and to provide second, variable reference signal to said second threshold circuit means.
Claim 14
Dependent Claim
12 words
The circuit according to claim 1 wherein said first circuit means comprises:
Claim 15
Dependent Claim
12 words
The circuit according to claim 3 wherein said second circuit means comprises:
Claim 16
Dependent Claim
25 words
The circuit according to claim 4 whereiin said gating circuit means is further operative to generate an output in response to said second variable-width pulse.
Claim 17
Dependent Claim
46 words
The circuit according to claim 4 wherein said second circuit means further comprises timer means operative in response to said second variable-width pulse to cause said gating circuit means to generate an output for a predetermined period of time after intiation of said second variable-width pulse.
Claim 18
Dependent Claim
9 words
The circuit according to claim 1 and further comprising:
Claim 19
Dependent Claim
65 words
The circuit according to claim 7 wherein said signal processing circuit further comprises third threshold circuit means operative to compare said input signal to a third reference signal and to generate a third variable-width pulse whenever said input signal falls below said third reference signal, said third variable-width pulse being provided to said first circuit means to disable same from generating said first variable-width pulse.
Claim 20
Dependent Claim
50 words
The circuit according to claim 8 wherein said signal processing circuit further comprises logic means operative to receive said first and third variable-width pulses, and further operative in response to either of said pulses to provide an input in lieu of said first variable-width pulse to said fourth circuit means.
Claim 21
Dependent Claim
24 words
The circuit according to claim 7 wherein said third circuit means comprises an OR gate, and said fourth circuit means comprises an AND gate.
References Cited (Backward Citations)
US3437833A
Cited
US3715738A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-10-14 | 1978-04-15 | 1978-10-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-10-14 | 1982-04-15 | 1982-10-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-10-14 | 1986-04-15 | 1986-10-15 | $7700.00 | Window Closed / Lapsed |