Commutatorless dc motor drive arrangement

Claim 2

A drive arrangement energized by a source of DC power comprising: a synchronous AC motor having an armature winding; an inverter circuit comprising a plurality of selectively actuatable switching devices, said inverter circuit having a DC side connected to the source of DC power and an AC side connected to said armature winding of said motor to provide electrical energy to said armature winding as determined by selective actuation of said switching devices; firing pulse means to produce firing pulses to selectively actuate said switching devices; control means to provide a series of timing pulses to be applied to said firing pulse means to control production of said firing pulses, said control means being responsive to the potential level of the source of DC power to determine the frequency of said timing pulses in such a fashion that the volt-time integral of the DC voltage between successive timing pulses always remains at a predetermined constant value; and regulating means to cause the voltage of the source of DC power to be applied to said inverter circuit with a gradual build-up to full magnitude.

Claim 3

A drive arrangement as claimed in claim 1 wherein said control means comprises: an integrator circuit to integrate the DC voltage that appears across said inverter circuit; a reference level source to provide a reference level signal; and a comparator circuit to determine when the output of said integrator circuit has a predetermined relationship with respect to said reference level signal and to produce timing pulses indicative thereof.

Claim 4

A drive arrangement as claimed in claim 2 and further comprising a reset circuit to cause said integrator circuit to begin another period of integration after the production of a timing pulse.

Claim 5

A drive arrangement as claimed in claim 1 and further comprising: modulating means to superimpose discontinuous pulses at a frequency high with respect to the starting frequency of said inverter circuit on the output of the source of DC power; current detecting means to determine the current drawn from the source of DC power; and restart means to cause the source of DC power to be removed from and reapplied to said inverter circuit when said current detecting means determines that the current drawn from the source of DC power exceeds a predetermined magnitude prior to the full voltage of the source of DC power being applied to said inverter circuit.

Claim 6

A drive arrangement as claimed in claim 1 wherein said motor is a polyphase synchronous motor having a plurality of armature windings.

Claim 7

A drive arrangement energized by a source of AC power comprising: a three-phase synchronous AC motor having a armature winding for each phase; a semiconverter circuit to produce a controllable magnitude DC voltage from the voltage of the source of AC power; an inverter circuit comprising a plurality of selectively actuatable switching devices, said switching devices being connected to provide electrical Energy to said armature windings of said motor as determined by selective actuation of said switching devices; an inductor connected between said semiconverter circuit and said inverter circuit; firing pulse means to produce firing pulses to selectively actuate said switching devices; an integrator circuit to integrate the DC voltage applied to said inverter circuit through said inductor; an integrator reference source to provide an integrator reference level signal; an integrator comparator circuit to determine when the output of said integrator circuit has a predetermined relationship with respect to said integrator reference level signal and to produce timing pulses indicative thereof, said timing pulses being applied to said firing pulse means to cause production of said firing pulses; a reset circuit to cause said integrator circuit to begin integrating anew upon production off each timing pulse; regulating means to cause said semiconverter to produce a DC voltage that gradually increases to full magnitude; current detecting means to determine the current drawn from said semiconverter; and restart means responsive to the output of said current detecting means to cause said controllable DC voltage of said semiconverter circuit to be returned to its starting value and to recommence its gradual increase in magnitude when the current drawn from said semiconverter exceeds a predetermined magnitude during start-up of said motor.

Claim 8

A drive arrangement energized by a source of AC power comprising: a three-phase synchronous AC motor having a armature winding for each phase; a semiconverter circuit to produce a controllable magnitude DC voltage from the voltage of the source of AC power; an inverter circuit comprising a plurality of selectively actuatable switching devices, said switching devices being connected to provide electrical Energy to said armature windings of said motor as determined by selective actuation of said switching devices; an inductor connected between said semiconverter circuit and said inverter circuit; firing pulse means to produce firing pulses to selectively actuate said switching devices; an integrator circuit to integrate the DC voltage applied to said inverter circuit through said inductor; an integrator reference source to provide an integrator reference level signal; an integrator comparator circuit to determine when the output of said integrator circuit has a predetermined relationship with respect to said integrator reference level signal and to produce timing pulses indicative thereof, said timing pulses being applied to said firing pulse means to cause production of said firing pulses; a reset circuit to cause said integrator circuit to begin integrating anew upon production off each timing pulse; regulating means to cause said semiconverter to produce a DC voltage that gradually increases to full magnitude; current detecting means to determine the current drawn from said semiconverter; and restart means responsive to the output of said current detecting means to cause said controllable DC voltage of said semiconverter circuit to be returned to its starting value and to recommence its gradual increase in magnitude when the current drawn from said semiconverter exceeds a predetermined magnitude during start-up of said motor.

Claim 9

A drive arrangement as claimed in claim 6 and further comprising wave-shaping means to fill in discontinuities in the voltage applied to said inverter circuit during start-up.

Claim 10

A drive arrangement as claimed in claim 7 wherein: said selectively actuable switching devices are six thyristors divided into three pairs, each pair of thyristors being connected in series with said controllable DC voltage applied thereacross; and each of said armature windings is connected to the midpoint of a separate one of said pairs of thyristors.

Claim 11

A drive arrangement as claimed in claim 8 wherein said wave-shaping means comprises: three pairs of diodes, the midpoint of each of said pairs of diodes being connected to the midpoint of a corresponding one of said pairs of thyristors; a first resistor connecting one end of each of said pairs of diodes to one of the DC terminals of said inverter circuit; and a second resistor connecting the other end of each of said pairs of diodes to the other DC terminal of said inverter circuit.

Claim 12

A drive arrangement as claimed in claim 6 wherein said restart means comprises: an abnormal start reference source to provide an abnormal start current level reference signal; and an abnormal start comparator circuit to reset said regulating means when the output of said current detecting means exceeds said abnormal start current level reference signal.

Claim 13

A drive arrangement as claimed in claim 10 wherein said regulating means comprises a ramp signal generator that may be reset to recommence production of the ramp signal upon receipt of a signal from said abnormal start comparator circuit.

Claim 14

A drive arrangement as claimed in claim 11 wherein said restart means further comprises: a window reference source to provide a window reference signal representative of the ramp signal level above which a detected current of the magnitude of said abnormal start current level reference signal no longer represents an abnormal start; a ramp comparator to produce a window signal output only when the ramp signal is less than said window reference signal; and reset means to reset said ramp signal generator only when signals are produced by both said abnormal start comparator and said ramp comparator.

Claim 15

A high-speed drive arrangement for a centrifugal compressor in an air conditioning system, energized by a source of AC power, comprising: a three-phase synchronous AC compressor motor having an armature winding for eaCh phase; a semiconverter circuit to produce a controllable magnitude DC voltage for the voltage of the source of AC power; an inverter circuit comprising three pairs of thyristors, each pair of thyristors being connected in series with said controllable DC voltage applied thereacross, each of said armature windings of said motor having one end thereof connected to the midpoint of a respective one of said pairs of thyristors, the other ends of said armature windings being connected in common; a smoothing inductor located in one line between said semiconverter and said inverter; firing pulse means to produce firing pulses to selectively actuate said thyristors; an integrator circuit to integrate the DC voltage applied to said inverter circuit through said inductor; an integrator reference source to provide an integrator reference level signal representative of a predetermined volt-time integral value; an integrator comparator circuit to determine when the output of said integrator circuit has a value equal to that of said integrator reference level signal and to produce timing pulses indicative thereof, said timing pulses being applied to said firing pulse means to cause production of said firing pulses at a frequency dependent upon the amplitude of said controllable DC voltage; a reset circuit to cause said integrator circuit to start a new cycle of operation upon production of each timing pulse; wave-shaping means comprising three pairs of diodes, each pair of diodes connected in series with suitable resistances between the two sides of the DC voltage applied to said converter circuit, the midpoint of each pair of diodes connected to the midpoint of a corresponding pair of thyristors; a ramp signal generator producing a ramp signal that is utilized to control said semiconverter to produce a DC voltage to be applied to said inverter circuit that gradually increases to full magnitude, said ramp signal generator being capable of being reset to recommence production of said ramp signal; current detecting means to determine the current drawn from said semiconverter; an abnormal start reference source to provide an abnormal start current level reference signal; an abnormal start comparator circuit to reset said ramp signal generator when the output of said current detecting means exceeds said abnormal start current level reference signal; a window reference source to provide a window reference signal representative of the level of said ramp signal above which a current drawn from said semiconverter of the magnitude of said abnormal start current level reference signal no longer represents an abnormal start; a ramp comparator to produce a window signal output only when said ramp signal is less than said window reference signal; and reset means to reset said ramp signal generator only when signals are produced by both said abnormal start comparator and said ramp comparator.

Claim 16

A high-speed drive arrangement for a centrifugal compressor in an air conditioning system, energized by a source of AC power, comprising: a three-phase synchronous AC compressor motor having an armature winding for eaCh phase; a semiconverter circuit to produce a controllable magnitude DC voltage for the voltage of the source of AC power; an inverter circuit comprising three pairs of thyristors, each pair of thyristors being connected in series with said controllable DC voltage applied thereacross, each of said armature windings of said motor having one end thereof connected to the midpoint of a respective one of said pairs of thyristors, the other ends of said armature windings being connected in common; a smoothing inductor located in one line between said semiconverter and said inverter; firing pulse means to produce firing pulses to selectively actuate said thyristors; an integrator circuit to integrate the DC voltage applied to said inverter circuit through said inductor; an integrator reference source to provide an integrator reference level signal representative of a predetermined volt-time integral value; an integrator comparator circuit to determine when the output of said integrator circuit has a value equal to that of said integrator reference level signal and to produce timing pulses indicative thereof, said timing pulses being applied to said firing pulse means to cause production of said firing pulses at a frequency dependent upon the amplitude of said controllable DC voltage; a reset circuit to cause said integrator circuit to start a new cycle of operation upon production of each timing pulse; wave-shaping means comprising three pairs of diodes, each pair of diodes connected in series with suitable resistances between the two sides of the DC voltage applied to said converter circuit, the midpoint of each pair of diodes connected to the midpoint of a corresponding pair of thyristors; a ramp signal generator producing a ramp signal that is utilized to control said semiconverter to produce a DC voltage to be applied to said inverter circuit that gradually increases to full magnitude, said ramp signal generator being capable of being reset to recommence production of said ramp signal; current detecting means to determine the current drawn from said semiconverter; an abnormal start reference source to provide an abnormal start current level reference signal; an abnormal start comparator circuit to reset said ramp signal generator when the output of said current detecting means exceeds said abnormal start current level reference signal; a window reference source to provide a window reference signal representative of the level of said ramp signal above which a current drawn from said semiconverter of the magnitude of said abnormal start current level reference signal no longer represents an abnormal start; a ramp comparator to produce a window signal output only when said ramp signal is less than said window reference signal; and reset means to reset said ramp signal generator only when signals are produced by both said abnormal start comparator and said ramp comparator.