Circuits for driving and addressing gas discharge panels by inversion techniques

Claim 2

In a circuit for controlling a multicelled, gas discharge, display/memory panel of the type in which a discharge in an enclosed ionizable gas generates charges of alternate sign collectable on discrete areas of dielectric surfaces which are backed by portions of conductors of a first conductor array which are proximate portions of conductors of a second conductor array, each of said proximate portions of respective conductors of said first and second arrays defining a discharge cell: first means for generatIng a first periodic pulsating sustaining voltage component of a first amplitude; second means for generating a second periodic pulsating sustaining voltage component of a second amplitude greater than said first amplitude, the sum of the absolute values of the first and second amplitudes at least equalling the amplitude of the sustaining voltage for said cells; and means for applying the first component to said first conductor array and the second component to said second conductor array with the first and second components so phased as to periodically impose and alternate the sustaining voltage of the cells across the opposed discrete charge storage areas.

Claim 3

A circuit according to claim 1 wherein said first generating means includes means to pull up said first sustaining voltage component to a high value, and means to pull-down said first sustaining voltage component to a low value; and wherein said component applying means includes a first plurality of display connector lines each connected to a conductor of said first array; a pull-up undirectionally conductive device connected between said first voltage component pull-up means and a display connector line of said first plurality and poled to pass current from said voltage pull-up means to said display line; and a pull-down unidirectionally conductive device connected between said voltage pull-down means and a display connector line of said first plurality to which a pull-up unidirectionally conductive device is connected, said pull-down device being poled to pass current from said display connector line to said voltage pull-down means.

Claim 4

A circuit according to claim 2 wherein said second generating means includes means to pull-up said second sustaining voltage component to a value above the low value of said first sustaining voltage component, and means to pull down said second sustaining voltage component to a low value below the low value of said first sustaining voltage component; and wherein said second component applying means includes a second plurality of display connector lines each connected to a conductor of said second array, a pull-up undirectionally conductive device connected between said voltage pull-up means for said second means and a display connector line of said second plurality and poled to pass current from said voltage pull-up means to said display connector line; and a pull-down unidirectionally conductive device connected between said voltage pull-down means for said second component and a display connector line of said second plurality to which a pull-up unidirectionally conductive device is connected, said pull-down device being poled to pass current from said display connector line to said voltage pull-down means.

Claim 5

A circuit according to claim 3 wherein said second sustaining voltage pull-up value is at least said first sustaining voltage pull-up value and said second sustaining voltage pull-down value is at least the absolute value of said first sustaining voltage pull-up value.

Claim 6

A circuit according to claim 3 including a pull-up buss connecting said first sustaining voltage component pull-up means to a plurality of said pull-up unidirectionally conductive devices for said display connector lines of said first plurality; a pull-down buss connecting said second sustaining voltage component pull-down means to a plurality of said pull-down unidirectionally conductive devices for said display connector lines of said second plurality; a low biasing source of said second sustaining voltage component low value; a clamping unidirectionally conductive device connected between said low biasing source and said pull-up buss poled to pass current from said biasing source to said pull-up buss; a high biasing source of said first sustaining voltage component high value; and a clamping unidirectionally conductive device connected between said high biasing source and said pull-down buss poled to pass current from said pull-down buss.

Claim 7

A circuit according to claim 3 wherein the pOtential difference between said second sustaining voltage pull-up value and said first sustaining pull-down value is at least the potential difference between said first sustaining voltage pull-up value and said first sustaining pull-down value and the potential difference between said second sustaining voltage pull-down value and said first sustaining voltage pull-down value is at least the amplitude of the potential difference between said first sustaining voltage pull-up value and said first sustaining voltage pull-down value.

Claim 8

A circuit according to claim 3 including an addressing circuit for selecting individual ones of said display connector lines coupled to conductors of said first and second arrays; unidirectional voltage pulse generating means controlled by said addressing circuit for producing pulses on selected display connector lines coupled to conductors in said first and second arrays to said low value of said first sustaining voltage component at a time said first component is at a high value and said second component is at a low value whereby the discharge state of the cell defined by said pulsed conductors is transferred from an ''''on state'''' to an ''''off state''''.

Claim 9

A circuit according to claim 7 including means to compensate for the tendency to shift the voltage level of first conductors which are not subjected to voltage pulses from address selection controlled unidirectional pulse generating means, said tendency being in response to voltage pulses from address selection controlled unidirectional pulse generating means for other conductors of said arrays which are capacitively coupled to said first conductors, comprising: a source of reference voltage; and a capacitance coupled between said reference voltage source and said first conductors whereby the sustainer voltage component applied to said display connector lines charges said capacitance to store charge for release to said first conductors.

Claim 10

A circuit according to claim 7 including means to compensate for the tendency to shift the voltage level of first conductors which are not subjected to a voltage pulse from address selection controlled unidirectional pulse generating means, said tendency being in response to a voltage pulse from address selection controlled unidirectional pulse generating means for other conductors, comprising: second unidirectional voltage pulse generating means controlled by said addressing circuit for producing voltage pulses to the sustainer component level effective on said first conductors at the moment the voltage pulse to be compensated is applied to the other conductors; and limiting means between said second unidirectional voltage pulse generating means and said first conductors.

Claim 11

A circuit according to claim 7 including a first pull-up buss connecting said first sustaining voltage component pull-up means to a plurality of said pull-up unidirectionally conductive devices for said display connector lines of said first plurality; a first pull-down buss connecting said first sustaining voltage component pull-down means to a plurality of said pull-down unidirectionally conductive devices for said display connector lines of said first plurality; a second pull-up buss connecting said second sustaining voltage component pull-up means to a plurality of said pull-up unidirectionally conductive devices for said display connector lines of said second plurality; a second pull-down buss connecting said second sustaining voltage component pull-down means to a plurality of said pull-down means to a plurality of said pull-down unidirectionally conductive devices for said display connector lines of said second plurality; unidirectional voltage pulse generating means controlled by said addressing circuit for producing pulses on said busses to said low value of said first sustaining voltage component at a time prior to operation of said pulse generating means for selected lines and while said first sustaining voltage component is at a high value and said seconD sustaining voltage component is at a low value whereby capacitive effects associated with said busses are minimized on said pulse generating means for selected display connector lines.

Claim 12

A circuit according to claim 10 including means for sensing the voltage levels on said busses for indicating the voltages on said busses are within a predetermined range of said low value of said first sustaining voltage component.

Claim 13

A circuit according to claim 11 including means to issue an enabling signal to said unidirectional voltage pulse generating means for producing pulses on selected display connector lines in response to the reduction of said voltages on said busses to said predetermined range.

Claim 14

A circuit according to claim 1 including means for generating a third periodic pulsating sustaining voltage component of a third amplitude; means for generating a fourth periodic pulsating sustaining voltage component of a fourth amplitude greater than either of said first third amplitudes, the sum of the absolute values of the third and fourth amplitudes at least equalling the amplitude of the sustaining voltage for said panel; means for applying said fourth component to said first conductor array and said third component to said second conductor array simultaneously with said fourth and third components so phased as to periodically impose and alternate the sustaining voltage of the cells across the opposed discrete charge storage areas; and means for shifting between a first operating mode wherein said first and second components are applied to said conductor arrays and a second operating mode wherein said third and fourth components are applied to said conductor arrays, whereby the relatively high and relatively low sustainer components are interchanged between the arrays.

Claim 15

A circuit according to claim 13 wherein said first generating means includes means to pull-up said first sustaining voltage component to a high value, and means to pull down said first sustaining voltage component to a low value; wherein said fourth generating means includes means to pull-up said fourth sustaining voltage component to a high value, and means to pull-down said fourth sustaining voltage component to a low value, and wherein said means for applying said first and fourth components to said first conductor array includes a first plurality of display connector lines each connected to a conductor of said first array; a pull-up, unidirectionally conductive device connected between said first and fourth voltage pull-up means and a display connector line of said first plurality and poled to pass current from said voltage pull-up means to said display connector line; and a pull-down, unidirectionally conductive device connected between said first and fourth voltage pull-down means and a display connector line of said first plurality to which a pull-up, unidirectionally conductive device is connected, said pull-down device being poled to pass current from said display connector line to said first and fourth voltage pull-down means.

Claim 16

A circuit according to claim 14 wherein said means to pull-up said first and fourth sustaining voltage components comprise a single pull-up means.

Claim 17

A circuit according to claim 14 wherein said second generating means includes means to pull up said second sustaining voltage component to a value above the low value of said first sustaining voltage component, and means to pull-down said second sustaining voltage component to a low value below the low value of said first sustaining voltage component; wherein said third generating means includes means to pull up said third sustaining voltage component to a value above the low value of said first sustaining voltage component, and means to pull-down said third sustaining voltage component; and wherein said means for applying said second and third components to said second conductor array includes a second plurality of display connector lines each connected to a conductor of said second array, pull-up undiRectionally conductive device connected between said second and third voltage pull-up means and a display connector line of said first plurality and poled to pass current from said voltage pull-up means to said display connector line, and a pull-down unidirectionally conductive device connected between said second and third voltage pull-down means and a display connector line of said first plurality to which a pull-up, unidirectionally conductive device is connected, said pull-down device being poled to pass current from said display connector line to said second and third voltage pull-down means.

Claim 18

A circuit according to claim 16 wherein said means to pull-up said first and fourth sustaining voltage components comprise a single pull-up means, and wherein said means to pull-up said second and third sustaining voltage components comprise a single pull-up means.

Claim 19

A circuit according to claim 16 including an addressing circuit for selecting individual ones of said conductors of said first and second arrays; addressing unidirectional voltage pulse generator means controlled by said addressing circuit for producing a pair of opposite polarity unidirectional pulses on selected conductors of said first and second arrays, each having a time duration relatively short with respect to a cycle of said periodic alternating sustaining voltage, and each being poled toward said low value of said first sustaining voltage component and of a magnitude to bring said selected conductors to said low value; means to apply the pulse of a decreasing value to the electrode of said array then at a high sustainer voltage component; means to actuate said shifting means to transfer from said first operating mode to said second operating mode in time sequence with said addressing means, whereby the discharge state of the cells in said panel are inverted to place normally ''''off'''' cells in the on state, prior to actuation of said addressing voltage pulse generator to issue pulses which transfer a selected cell in the on state to the off state; and means to actuate said shifting means to transfer from said second operating mode to said first operating mode subsequent to the actuation of said addressing voltage pulse generator whereby said selected cell is placed in the on state.

Claim 20

A circuit according to claim 16 wherein said low value of said first and third sustainer voltage components are like ''''reference voltages,'''' said high value of said first, second, third and fourth sustainer voltage components are like voltages VH, and said low value of said second and fourth sustainer voltage components are like voltages Vl, including first and second pull-up busses connecting respectively said first and second pull-up means to display connector lines connected to said conductors of said first and second arrays respectively; first and second pull-down busses connecting respectively said first and second pull-down means to display connector lines connected to said conductor of said first and second arrays respectively; and means for clamping the voltage levels on said conductors with respect to displacement currents in said array comprising a source of voltage VL, a source of voltage VH, unidirectionally conductive devices connecting said source of voltage VL to each of said first said second pull-up busses and poled to pass current from said source to said busses, and unidirectionally conductive devices connecting said source of voltage VH to each of said first and second pull-down busses and poled to pass current from said busses to said source.

Claim 21

A circuit according to claim 16 wherein said low value of said first and third sustainer voltage components are like reference voltages including first and second pull-up busses connecting respectively said first and second pull-up means to display connector lines connected to said conductors of said first and second arrays respectively; normally open switch means connected between a sOurce of said reference voltage and said first and second pull-up busses; unidirectionally conductive devices connected serially with said switch means between said source of said reference voltage and said first and second pull-up busses and poled to pass current from said source to said pull-up busses whereby displacement currents across said panel are accommodated selectively; and means for selectively operating said switch means to its closed condition coincident with transitions of said sustainer components to said reference voltage levels.

Claim 22

A circuit according to claim 16 wherein said low value of said first sustainer voltage component is a reference voltage including: addressing unidirectional voltage pulse generating means or producing positive going unidirectional pulses, each having a time duration relatively short with respect to a cycle of said periodic alternating sustaining voltage and of a magnitude to draw the voltage on any conductors to which it is applied near said reference voltage; addressing unidirectional voltage pulse generator means for producing negative going unidirectional pulses, each having a time duration relatively short with respect to a cycle of said periodic alternating sustaining voltage and of a magnitude to draw the voltage on any conductors to which it is applied near said reference voltage; means to connect each generator of positive going pulses to a correlated display connector line for conductors in each of said arrays and to apply said pulses only to that display connector line for conductors which are at a low voltage relative to said reference voltage; means to connect each generator of negative going pulses to a correlated display connector line for conductors in each of said arrays and to apply said pulses only to that display connector line for conductors which are at a high voltage relative to said reference; and an addressing circuit for actuating individual ones of said addressing pulse generator means.

Claim 23

A circuit according to claim 21 wherein said individual pulse generator means are a source of said reference voltage and a normally open switch selectively closed by actuation of said addressing circuit; wherein said means to connect each of said generators of positive going pulses to said respective display connector lines of said first and second arrays are unidirectionally conductive devices connecting said generator to each of said respective display connector lines and poled to pass current from said generator to said display connector lines; and wherein said means to connect each of said generators of negative going pulses to said respective display connector lines of said first and second arrays and unidirectionally conductive devices connecting said generator to each of said respective display connector lines and poled to pass current from said display connector lines to said generator.

Claim 24

A circuit according to claim 16 wherein said first and third sustaining voltage components each have a like low voltage, including an addressing circuit for selecting individual ones of said conductors of said first and second arrays; addressing unidirectional voltage pulse generator means controlled by said addressing circuit for producing a pair of opposite polarity unidirectional pulses on selected conductors of said first and second arrays, each having a time duration relatively short with respect to a cycle of said periodic alternating sustaining voltage, and each being poled toward said low value of said first sustaining voltage component and of a magnitude to bring said selected conductors to said low value whereby a cell comprised of said pulsed conductors of said first and second arrays is placed in an off discharge state.

Claim 25

A circuit according to claim 23 including first and second pull-up busses connecting respectively said first and second pull-up means to display connector lines connected to said conductors of said first and second arrays respectively; first and second pull-down busses connecting Respectively said first and second pull-down means to display connector lines connected to said conductors of said first and second arrays respectively; unidirectional voltage pulse generating means controlled by said addressing circuit for producing negative going pulses on said pull-up busses and positive going pulses on said pull-down busses of a magnitude to pull said busses near said low value of said first sustaining voltage component at a time prior to operation of said addressing pulse generators for selected display connector lines; unidirectionally conductive device connecting said unidirectional voltage pulse generating means for negative going pulses to each of said first and second pull-up busses and poled to pass current from said busses to said generating means; and unidirectionally conductive device connecting said unidirectional voltage pulse generating means for positive going pulses to each of said first and second pull-down busses and poled to pass current from said generating means to said busses.

Claim 26

A circuit according to claim 24 including means for sensing the voltage levels on said busses for indicating said busses are within a predetermined range of said low value of said first sustaining voltage component.

Claim 27

A circuit according to claim 20 including means to issue an enabling signal to said addressing unidirectional voltage pulse generating means for producing pulses on selected display connector lines in response to the reduction of said voltages on said busses to said predetermined range.

Claim 28

In a circuit for controlling a multicelled, gas discharge, display/memory panel of the type in which a discharge in an enclosed ionizable gas generates charges of alternate sign collectable on discrete areas of dielectric surfaces which are backed by portions of conductors of first conductor array which are proximate portions of conductors of a second conductor array, each of said proximate portions of respective conductors of said first and second arrays defining a discharge cell: means for imposing an alternating sustaining voltage between said first and second arrays whereby said first array is at a relatively high voltage during first time intervals in which said second array is at a relatively low voltage and said first array is at a relatively low voltage during second time intervals in which said second array is at a relatively high voltage; a first plurality of display connector lines each connected to a conductor of said first array; a second plurality of display connector lines each connected to a conductor of said second array; addressing pulsers to pull the voltage on a display connector line in a given direction toward a value intermediate said relatively high and relatively low voltages; a first unidirectional conductive means coupling each addressing pulser to a respective first display connector line and poled to pass signals to said display connector line when said display connector line has a voltage displaced opposite said given direction from said intermediate value; a second unidirectional conductive means coupling each addressing pulser to a respective second display connector line and poled to pass signals to said display connector line when said display connector line has a voltage displaced opposite said given direction from said intermediate value; and an addressing circuit for selectively actuating said pulsers in synchronism with the first and second time intervals of said sustaining voltage whereby only that display connector line pulser which has a voltage displaced opposite said given direction from said intermediate value has its voltage pulled in said given direction toward said intermediate value.

Claim 29

In a circuit for controlling a multicelled, gas discharge, display/memory panel of the type in which a discharge in an enclosed ionizable gas generates charges of alternate sign collectable on discrete areas of dielectric surfaces which are backed by portions of conductors of first conductor array which are proximate portions of conductors of a second conductor array, each of said proximate portions of respective conductors of said first and second arrays defining a discharge cell: means for imposing an alternating sustaining voltage between said first and second arrays whereby said first array is at a relatively high voltage during first time intervals in which said second array is at a relatively low voltage and said first array is at a relatively low voltage during second time intervals in which said second array is at a relatively high voltage; a first plurality of display connector lines each connected to a conductor of said first array; a second plurality of display connector lines each connected to a conductor of said second array; addressing pulsers to pull the voltage on a display connector line in a given direction toward a value intermediate said relatively high and relatively low voltages; a first unidirectional conductive means coupling each addressing pulser to a respective first display connector line and poled to pass signals to said display connector line when said display connector line has a voltage displaced opposite said given direction from said intermediate value; a second unidirectional conductive means coupling each addressing pulser to a respective second display connector line and poled to pass signals to said display connector line when said display connector line has a voltage displaced opposite said given direction from said intermediate value; and an addressing circuit for selectively actuating said pulsers in synchronism with the first and second time intervals of said sustaining voltage whereby only that display connector line pulser which has a voltage displaced opposite said given direction from said intermediate value has its voltage pulled in said given direction toward said intermediate value.

Claim 30

A circuit according to claim 27 wherein said addressing pulsers are pull-down pulsers and said oppositely displaced voltage is above said intermediate value.

Claim 31

A circuit according to claim 27 wherein said addressing pulsers are pull-up pulsers and said oppositely displaced voltage is below said intermediate value.

Claim 32

A circuit according to claim 27 including second addressing pulsers to pull the voltage on a display connector line in a second direction opposite said given direction toward a value intermediate said relatively high and relatively low voltages; a third unidirectional conductive means coupling each second addressing pulser to respective ones of at least some of said first display connector lines and poled to pass signals to said display connector line when said display connector line has a voltage displaced opposite said second direction from said intermediate value; a fourth unidirectional conductive means coupling each second addressing pulser to respective ones of at least some of said second display connector lines and poled to pass signals to said display connector line when said display connector line has a voltage displaced opposite said second direction from said intermediate value; and wherein said addressing circuit selectively actuates said second pulsers in synchronism with the first and second time intervals of said sustaining voltage.

Claim 33

In a circuit for controlling a multicelled, gas discharge, display/memory panel of the type in which a discharge in an enclosed ionizable gas generates charges of alternate sign collectible on discrete areas of dielectric surfaces which are backed by portions of conductors of a first conductor array which are proximate portions of conductors of a second conductor array, each of said proximate-portions of respective conductors of said first and second arrays defining a discharge cell: first and second means for applying a first periodic pulsating sustaining voltage component of a first amplitude based upon a reference voltage respectively to said first conductor array and to said second conductor array; third and fourth means for applying a second periodic pulsating sustaining voltage component respectively to said first conductor array and to said second conductor array, said second sustaining voltage component being of a second amplitude greater than said first amplitude, including excursions above and below said reference voltage, and of an amplitude which when added to the first amplitude at least equals the sustaining voltage for said cells; first means for actuating said first and third applying means simultaneously; second means for actuating said second and fourth means simultaneously; and means for shifting between said first and second actuating means.

Claim 34

In a circuit for controlling a multicelled, gas discharge, display/memory panel of the type in which a discharge in an enclosed ionizable gas generates charges of alternate sign collectible on discrete areas of dielectric surfaces which are backed by portions of conductors of a first conductor array which are proximate portions of conductors of a second conductor array, each of said proximate-portions of respective conductors of said first and second arrays defining a discharge cell: first and second means for applying a first periodic pulsating sustaining voltage component of a first amplitude based upon a reference voltage respectively to said first conductor array and to said second conductor array; third and fourth means for applying a second periodic pulsating sustaining voltage component respectively to said first conductor array and to said second conductor array, said second sustaining voltage component being of a second amplitude greater than said first amplitude, including excursions above and below said reference voltage, and of an amplitude which when added to the first amplitude at least equals the sustaining voltage for said cells; first means for actuating said first and third applying means simultaneously; second means for actuating said second and fourth means simultaneously; and means for shifting between said first and second actuating means.

Claim 35

A circuit according to claim 31 including means for causing said first sustaining voltage component to be out of phase with said second sustaining voltage component whereby the excursions of said components are on opposite sides of said reference voltage during a given interval; an addressing circuit for selecting individual ones of said conductors of said first and second arrays; and unidirectional voltage pulse generator means controlled by said addressing circuit for producing a pair of opposite polarity unidirectional pulses on selected conductors of said first and second array, each pulse being said reference voltage and of a time duration relatively short with respect to a cycle of said periodic sustaining voltage.

Claim 36

A circuit according to claim 32 wherein control by said first actuating means is the normal operating mode for said panel and including a sequencing control for said shifting and actuating means for first shifting to said second actuating means, then actuating a pulse generator means by said addressing means while said second actuating means is effective, and then actuating said shifting means to shift to said first actuating means whereby the panel discharge states are inverted, a selected cell is transferred to off discharge state and said panel discharge states are reinverted to place said selected cell in an on discharge state.

Claim 37

A circuit according to claim 31 including means for actuating said shifting means at time intervals to periodically invert the discharge state of cells of said panel.

Claim 38

A circuit according To claim 34 wherein successive actuations of said shifting means are at time intervals of different length whereby one state of discharge of cells of said panel predominates over the opposed state of discharge.

Claim 39

In a circuit for controlling a multicelled, gas discharge, display/memory panel of the type in which a discharge in an enclosed ionizable gas generates charges of alternate sign collectible on discrete areas of dielectric surfaces which are backed by portions of conductors of a first conductor array which are proximate portions of conductors of a second conductor array, each of said proximate portions of respective conductors of said first and second arrays defining a discharge cell: means for applying a first level periodic alternating sustaining voltage across said first and second conductor arrays; means for selectively shifting said sustaining voltage to a second level to invert the discharge state of all cells comprised of conductors of said first and second conductor arrays; address pulser means to apply signals opposing sustaining voltage levels on selected individual pairs of opposed conductors comprising discharge cells, said applied signals being of a magnitude to transfer said discharge cells from an on state of discharge to an off state of discharge; cell erase means to actuate said address pulser means for selected cells while said means for applying the first level sustaining voltage is operating; and cell write means to actuate said means for shifting the sustaining voltage to the second level and to actuate said address pulser means for selected cells during operation said shifting means and subsequent to operation of said address pulser terminate operation of said shifting means and operate said means for applying the first level of sustaining voltage, whereby the selected cells are transferred from an off state of discharge to an on state of discharge.

Claim 40

In a circuit for controlling a multicelled, gas discharge, display/memory panel of the type in which a discharge in an enclosed ionizable gas generates charges of alternate sign collectible on discrete areas of dielectric surfaces which are backed by portions of conductors of a first conductor array which are proximate portions of conductors of a second conductor array, each of said proximate portions of respective conductors of said first and second arrays defining a discharge cell: means for applying a first level periodic alternating sustaining voltage across said first and second conductor arrays; means for selectively shifting said sustaining voltage to a second level to invert the discharge state of all cells comprised of conductors of said first and second conductor arrays; address pulser means to apply signals opposing sustaining voltage levels on selected individual pairs of opposed conductors comprising discharge cells, said applied signals being of a magnitude to transfer said discharge cells from an on state of discharge to an off state of discharge; cell erase means to actuate said address pulser means for selected cells while said means for applying the first level sustaining voltage is operating; and cell write means to actuate said means for shifting the sustaining voltage to the second level and to actuate said address pulser means for selected cells during operation said shifting means and subsequent to operation of said address pulser terminate operation of said shifting means and operate said means for applying the first level of sustaining voltage, whereby the selected cells are transferred from an off state of discharge to an on state of discharge.