US3840755A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit arrangement including a high voltage transistor
Assignee: US Philips Corp
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Filing: 1972-10-13
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Granted: 1974-10-08
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Expires: 1992-10-13
Abstract
Abstract The dissipation and the associated thermal load on the transistor occurring during inverse operation of a high voltage power transistor at the emitter base diode, for example, in a horizontal deflection output stage is substantially prevented by a diode which is arranged anti-parallel with the base emitter diode of the transistor. The diode must have a switching delay of at least 1 Mu s in order that the switching off of the transistor is not perturbed. The switching delay is obtained by impedances arranged in series with the diode. The impedances may consist of saturable or non-saturable coils or of a transistor.
Inventors
- 👤 G Benner
- 👤 G Stacker
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 23:02
CPC Classifications
H; H03; H03K; H03K4/00; H03K4/06; H03K4/08; H03K4/48; H03K4/60; H03K4/62
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
148 words
A circuit for switching a high voltage transistor between a saturation condition and a cut off condition comprising, drive means coupled to the transistor input circuit to provide a pulsatory switching signal between the base electrode and the emitter electrode of the transistor of a magnitude and polarity to drive the transistor from saturation into cut off, a load impedance connected to the collector electrode of the transistor, a diode connected between the base electrode and the emitter electrode of the transistor with the conductivity direction of said diode being opposite to that of the base emitter junction of the transistor, and at least one impedance connected in series with the diode across the transistor base-emitter junction to provide a delay time of at least one microsecond whereby the turn-on time of said diode is delayed at least one microsecond upon the application of said pulsatory switching signal.
Claim 2
Dependent Claim
148 words
A circuit for switching a high voltage transistor between a saturation condition and a cut off condition comprising, drive means coupled to the transistor input circuit to provide a pulsatory switching signal between the base electrode and the emitter electrode of the transistor of a magnitude and polarity to drive the transistor from saturation into cut off, a load impedance connected to the collector electrode of the transistor, a diode connected between the base electrode and the emitter electrode of the transistor with the conductivity direction of said diode being opposite to that of the base emitter junction of the transistor, and at least one impedance connected in series with the diode across the transistor base-emitter junction to provide a delay time of at least one microsecond whereby the turn-on time of said diode is delayed at least one microsecond upon the application of said pulsatory switching signal.
Claim 3
Dependent Claim
24 words
A circuit as claimed in claim 1; wherein said one impedance includes at least one inductor for delaying the switching instant of the diode.
Claim 4
Dependent Claim
24 words
A circuit as claimed in claim 2 wherein said one inductor comprises ferrite beads provided on at least one connection wire to the diode.
Claim 5
Dependent Claim
93 words
A circuit as claimed in claim 1, wherein said load impedance includes inductor means which, in conjunction with said pulsatory switching signal, produce an inverse current flow through the transistor base-collector junction during a portion of the transistor operation cycle, and characterized in thAt the one impedance exhibits a large impedance value upon the occurrence of the pulsatory switching signal at the base of the transistor and exhibits a low impedance value during the occurrence of said inverse current through the collector base path of the transistor during inverse operation of said transistor.
Claim 6
Dependent Claim
55 words
A circuit as claimed in claim 4, characterized in that the one impedance comprises a saturable reactor which has a large inductance during the occurrence of the pulsatory switching signal at the base of the transistor and a low inductance during the occurrence of the inverse current through the collector base path of said transistor.
Claim 7
Dependent Claim
18 words
A circuit as claimed in claim 5, further comprising a resistor connected in parallel with the saturable reactor.
Claim 8
Dependent Claim
76 words
A circuit as claimed in claim 4, characterized in that the one impedance comprises a second transistor whose collector emitter path is connected in series with the diode with the same conductivity direction as the diode, and means for driving said second transistor so that it is cut off when the pulsatory switching signal occurs and is conducting when the inverse current flows through the collector base path during inverse operation of the high voltage transistor.
Claim 9
Dependent Claim
71 words
A circuit as claimed in claim 4, characterized in that the diode comprises the emitter base diode junction of a second transistor and the impedance comprises the collector base diode thereof, and means for driving said second transistor so that it is cut off when the pulsatory switching signal occurs and is conducting when the inverse current flows through the collector base path during inverse operation of the high voltage transistor.
Claim 10
Dependent Claim
46 words
A circuit as claimed in claim 1 further comprising inductor means connected in series circuit with said switching signal applying means and the base-emitter junction of the transistor for limiting the variation in reverse base current flow when the switching signal drives the transistor into cut-off.
Claim 11
Dependent Claim
14 words
A circuit as claimed in claim 1 wherein said load impedance comprises a coil.
Claim 12
Dependent Claim
127 words
A switching circuit for producing a sawtooth current in a load comprising, a transistor with its collector connected to said load, means for applying a switching signal between the base and emitter electrodes of the transistor of a magnitude and polarity to alternately turn the transistor on and off, a diode, an impedance element providing a delay time of at least 1 microsecond, and means connecting the diode and the impedance element in series across the transistor base and emitter electrodes and with the current conductivity direction of the diode opposite to that of the transistor base-emitter junction whereby the turn-on time of the diode is at least one microsecond in response to a switching signal of a polarity that tends to drive the transistor into cutoff.
Claim 13
Dependent Claim
127 words
A switching circuit for producing a sawtooth current in a load comprising, a transistor with its collector connected to said load, means for applying a switching signal between the base and emitter electrodes of the transistor of a magnitude and polarity to alternately turn the transistor on and off, a diode, an impedance element providing a delay time of at least 1 microsecond, and means connecting the diode and the impedance element in series across the transistor base and emitter electrodes and with the current conductivity direction of the diode opposite to that of the transistor base-emitter junction whereby the turn-on time of the diode is at least one microsecond in response to a switching signal of a polarity that tends to drive the transistor into cutoff.
Claim 14
Dependent Claim
69 words
A switching circuit as claimed in claim 11 wherein said load is arranged to develop a voltage of an amplitude and polarity to cause a reverse current to flow through said load and the transistor base-collector junction via said diode during a portion of the transistor operating cycle when said switching signal cuts off the transistor, and a source of DC voltage coupled to the collector of the transistor.
Claim 15
Dependent Claim
37 words
A switching circuit as claimed in claim 11 wherein said impedance element comprises a saturable reactor that is driven into saturation during a portion of the transistor operating cycle when said switching signal cuts off the transistor.
Claim 16
Dependent Claim
72 words
A switching circuit as claimed in claim 11 wherein said impedance element comprises a second transistor connected in series with the diode and polarized to pass current in the same direction as the diode, and means for applying a cut-off control signal to the control electrode of the second transistor in synchronism with the switching signal so that the second transistor is cut-off when the switching signal cuts off the first transistor.
Claim 17
Dependent Claim
49 words
A switching circuit as claimed in claim 14 further comPrising inductor means connected in series circuit with said switching signal applying means and the base-emitter junction of the first transistor for limiting the variation in reverse base current flow when the switching signal drives the first transistor into cut-off.
Claim 18
Dependent Claim
47 words
A switching circuit as claimed in claim 11 further comprising inductor means connected in series circuit with said switching signal applying means and the base-emitter junction of the transistor for limiting the variation in reverse base current flow when the switching signal drives the transistor into cut-off.
Claim 19
Dependent Claim
89 words
A switching circuit as claimed in claim 12 wherein said impedance element comprises a saturable reactor that is driven into saturation by said reverse current flow and is unsaturated during a portion of the time that the switching signal cuts off the transistor thereby to provide said 1 microsecond time delay, and inductor means connected in series circuit with said switching signal applying means and the base-emitter junction of the transistor for limiting the variation in reverse base current flow when the switching signal drives the transistor into cut-off.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-10-07 | 1978-04-08 | 1978-10-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-10-07 | 1982-04-08 | 1982-10-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-10-07 | 1986-04-08 | 1986-10-08 | $7700.00 | Window Closed / Lapsed |