Abstract A decimal-coded or equivalent keyboard network is adapted upon each keyboard pushbutton actuation to operate a pulse generator and cause a pulse to be applied to a counter for controlling a sequential comparator. Also connected to the comparator are the movable contacts of four single-pole, multiple-throw switches having fixed contacts connected to the outputs of the keyboard network. Where successive pushbutton operations occur in proper order, controlled apparatus is rendered operable. The first pushbutton operation also triggers a timing pulse generator, and the duration of the timing pulse is ample so that pushbuttons can be actuated in the correct sequence. If the proper pushbuttons are not actuated in the correct sequence, operation of the controlled apparatus is inhibited. If a predetermined number of errors occur, an annunciator signals this fact. If two or more pushbuttons are actuated simultaneously, resistive elements coupled between the keyboard network and the reset terminal of the timing pulse generator cause the timing pulse to be terminated and prevent operation of the controlled apparatus.
In combination: decimal coded or like keyboard means having a plurality of manually operable key elements and a network including switches to be actuated by said key elements; apparatus to be coupled to and operated from a power source when predetermined key elements are actuated in a predetermined sequence; means operable upon actuation of the first key element in a sequence to develop a timing pulse, said timing pulse developing means being normally operable to develop a pulse of predetermined duration, said timing pulse developing means having a reset terminal; means operable upon each key element actuation to develop a momentary pulse; sequential comparator means; a plurality of single pole, multiple throw switches connected between said comparator means and said keyboard network; counter means connected between said moMentary pulse developing means and said comparator means for conditioning said comparator means for operation upon each occurrence of a momentary pulse, said comparator means being adapted to develop a first logic level output where network switches are coupled to multiple throw switches by key element actuation, and a second logic level output if network switches are not coupled to multiple throw switches by key element actuation; means responsive to first logic level outputs of said comparator means to couple said apparatus to the power source, said coupling means being enabled by said counter means upon the last key element actuation of a sequence, whereby key element actuations in the predetermined sequence effects operation of the apparatus after the last key element actuation thereof, said coupling means being inhibited by a second logic level output by said comparator means from coupling the apparatus to the power source; and resistive means in circuit with said reset terminal and said network switches, said resistive means being operable upon simultaneous actuation of two or more key elements to reset said timing pulse generator and thereby terminate said timing pulse short of said predetermined duration.
Claim 2
Dependent Claim
318 words
In combination: decimal coded or like keyboard means having a plurality of manually operable key elements and a network including switches to be actuated by said key elements; apparatus to be coupled to and operated from a power source when predetermined key elements are actuated in a predetermined sequence; means operable upon actuation of the first key element in a sequence to develop a timing pulse, said timing pulse developing means being normally operable to develop a pulse of predetermined duration, said timing pulse developing means having a reset terminal; means operable upon each key element actuation to develop a momentary pulse; sequential comparator means; a plurality of single pole, multiple throw switches connected between said comparator means and said keyboard network; counter means connected between said moMentary pulse developing means and said comparator means for conditioning said comparator means for operation upon each occurrence of a momentary pulse, said comparator means being adapted to develop a first logic level output where network switches are coupled to multiple throw switches by key element actuation, and a second logic level output if network switches are not coupled to multiple throw switches by key element actuation; means responsive to first logic level outputs of said comparator means to couple said apparatus to the power source, said coupling means being enabled by said counter means upon the last key element actuation of a sequence, whereby key element actuations in the predetermined sequence effects operation of the apparatus after the last key element actuation thereof, said coupling means being inhibited by a second logic level output by said comparator means from coupling the apparatus to the power source; and resistive means in circuit with said reset terminal and said network switches, said resistive means being operable upon simultaneous actuation of two or more key elements to reset said timing pulse generator and thereby terminate said timing pulse short of said predetermined duration.