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US3838355A Expired / Lapsed US ⏱️ 0.0 years remaining

Binary coded digital frequency synthesis

Assignee: Cutler Hammer Inc
•
Filing: 1973-07-23
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Granted: 1974-09-24
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Expires: 1993-07-23
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Abstract

Abstract Any one of a group of discrete frequencies, each offset from a starting frequency by a respective number of predetermined fixed frequency intervals, is generated selectively using only two driving frequencies, chosen in a sequence according to a binary coded representation of the number corresponding to the selected frequency. The synthesis is readily adaptable to various numerical radices, and to any number of digital orders by an iterative technique realizable with a cascade arrangement of identical modules.

Inventors

  • 👤 R Papaieck

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 19:05
CPC Classifications
H; H03; H03B; H03B21/00; H03B21/01; H03B21/04

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 210 words
Apparatus for synthesizing Rn discrete frequencies corresponding to respective binary coded representations of digits in n digital orders of a numerical system of radix R, including n cascaded digital selector modules, each corresponding to a respective one of said digital orders, each of said modules comprising: a. an even number N, such that N binary bits are sufficient to express all figures of the numerical system, of frequency subtracting devices each having subtrahend and minuend input terminals and a remainder output terminal, the subtrahend input terminal of said first subtracting means constituting the input terminal of the module, b. N-1 frequency halving devices, each coupling the subtrahend input terminal of a respective subtracting device, other than the first, to the output terminal of the immediately preceding subtracting device, c. means for providing only two driving signals of predetermined respective frequencies, d. switch means for selectively applying one of said driving signals to the minuend input terminal of each of said frequency subtracting devices in accordance with the binary valve to be represented at a corresponding bit position, and e. means for multiplying the frequency of the output of the last of said frequency subtracting devices by a constant 2(N 1)/R that relates the number of halving devices to the radix.
Claim 2
Dependent Claim 210 words
Apparatus for synthesizing Rn discrete frequencies corresponding to respective binary coded representations of digits in n digital orders of a numerical system of radix R, including n cascaded digital selector modules, each corresponding to a respective one of said digital orders, each of said modules comprising: a. an even number N, such that N binary bits are sufficient to express all figures of the numerical system, of frequency subtracting devices each having subtrahend and minuend input terminals and a remainder output terminal, the subtrahend input terminal of said first subtracting means constituting the input terminal of the module, b. N-1 frequency halving devices, each coupling the subtrahend input terminal of a respective subtracting device, other than the first, to the output terminal of the immediately preceding subtracting device, c. means for providing only two driving signals of predetermined respective frequencies, d. switch means for selectively applying one of said driving signals to the minuend input terminal of each of said frequency subtracting devices in accordance with the binary valve to be represented at a corresponding bit position, and e. means for multiplying the frequency of the output of the last of said frequency subtracting devices by a constant 2(N 1)/R that relates the number of halving devices to the radix.
Claim 3
Dependent Claim 73 words
The apparatus set forth in claim 1, wherein said Rn discrete frequencies include a starting frequency F, and lie in a range between F and F+F'', said driving signal frequencies being predetermined therefrom as follows: fL 3(R- 1)/2N-1 F+F''and fH fL+F'', wherein fL is the lower and fH is the higher of said driving signal frequencies, and the input to the first of said modules is a signal of the starting frequency F.
Claim 4
Dependent Claim 95 words
The apparatus set forth in claim 1, wherein said switch means for selectively applying said driving signals to said subtracting devices are connected to successive ones of said subtracting devices in alternate senses, to represent a binary bit value of zero by the higher of said driving frequencies in the first and subsequent odd-numbered ones of said subtracting devices, and by the lower of said driving frequencies in the second and subsequent even-numbered ones of said subtracting devices, and the other of said driving frequencies in each case representing a binary bit value of one.
Claim 5
Dependent Claim 59 words
The apparatus set forth in claim 3, wherein the last of said digital orders, is designed to operate over an extended frequency selection range F'''' F''(2N/R), and said switch means of said last module may be set to represent binary words exceeding that corresponding to the radix R, whereby a total of 2NR(N 1) discrete frequencies can be synthesized.
Claim 6
Dependent Claim 165 words
A digit selector module for frequency synthesis with binary coding in a number system of a given radix, comprising: a. an even number N, such that N binary bits are sufficient to express all figures of the radix, of frequency subtracting devices each having subtrahend and minuend input terminals and a remainder output terminal, the subtrahend input terminal of said first subtracting means constituting the input terminal of the module, b. N-1 frequency halving devices, each coupling the subtrahend input terminal of a respective subtracting device, other than the first, to the output terminal of the immediately preceding subtracting device, c. means for providing only two driving signals of predetermined respective frequencies, d. means for selectively applying one of said driving signals to the minuend input terminal of each of said frequency subtracting devices, and e. means for multiplying the frequency of the output of the last of said frequency subtracting devices by a constant that relates the number of halving devices to the radix.
Claim 7
Dependent Claim 165 words
A digit selector module for frequency synthesis with binary coding in a number system of a given radix, comprising: a. an even number N, such that N binary bits are sufficient to express all figures of the radix, of frequency subtracting devices each having subtrahend and minuend input terminals and a remainder output terminal, the subtrahend input terminal of said first subtracting means constituting the input terminal of the module, b. N-1 frequency halving devices, each coupling the subtrahend input terminal of a respective subtracting device, other than the first, to the output terminal of the immediately preceding subtracting device, c. means for providing only two driving signals of predetermined respective frequencies, d. means for selectively applying one of said driving signals to the minuend input terminal of each of said frequency subtracting devices, and e. means for multiplying the frequency of the output of the last of said frequency subtracting devices by a constant that relates the number of halving devices to the radix.
Claim 8
Dependent Claim 141 words
A digit selector module for binary coded decimal frequency synthesis in a range between F and F+F'', comprising: a. four frequency subtracting devices each having a subtrahend input terminal, a minuend input terminal and a remainder output terminal, the subtrahend input terminal of said first subtracting means constituting the input terminal of the module. b. three frequency halving devices, each coupling the subtrahend input terminal of a respective subtracting device, other than the first, to the output terminal of the immediately preceding subtracting device, c. means for selectively applying one of two driving signals of frequencies fL and fH to the minuend input terminal of Each of said frequency subtracting devices, said frequencies being predetermined as follows: fL (9/5) F+F'' fH fL+F'' d. and means for multiplying the frequency of the output of the last of said subtracting devices by 4/5.
Claim 9
Dependent Claim 141 words
A digit selector module for binary coded decimal frequency synthesis in a range between F and F+F'', comprising: a. four frequency subtracting devices each having a subtrahend input terminal, a minuend input terminal and a remainder output terminal, the subtrahend input terminal of said first subtracting means constituting the input terminal of the module. b. three frequency halving devices, each coupling the subtrahend input terminal of a respective subtracting device, other than the first, to the output terminal of the immediately preceding subtracting device, c. means for selectively applying one of two driving signals of frequencies fL and fH to the minuend input terminal of Each of said frequency subtracting devices, said frequencies being predetermined as follows: fL (9/5) F+F'' fH fL+F'' d. and means for multiplying the frequency of the output of the last of said subtracting devices by 4/5.

References Cited (Backward Citations)

US2829255A Cited
US2894133A Cited
US3212024A Cited
US3235815A Cited
US3372347A Cited
US3454883A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-09-23 1978-03-25 1978-09-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-09-23 1982-03-25 1982-09-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-09-23 1986-03-25 1986-09-24 $7700.00 Window Closed / Lapsed

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