US3836792A
Expired / Lapsed
US
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Four stage storage enhanced logic circuit
Assignee: Unisys Corp
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Filing: 1971-10-06
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Granted: 1974-09-17
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Expires: 1991-10-06
Abstract
Abstract There is disclosed herein a four stage circuit which utilizes charge storage in a transistor together with its inverse Beta to obtain fast switching. A diode anti-saturation clamp is also utilized in one of the stages to enhance rapid switching. The circuit is designed such that it is suitable for integration in a monolithic semiconductor device.
Inventors
- 👤 J Eckert
- 👤 R Bucks
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 02:38
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/01; H03K19/013
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
232 words
The logic circuit consisting of, a. A first circuit stage comprising a first semiconductor device having a relative high Inverse Beta characteristic and including means for storing minority charges; b. means connected to the input of said first circuit stage for receiving logical input signals; c. another circuit stage comprising a second semiconductor device coupled to the output of said first mentioned stage; d. feedback means coupled across said second mentioned stage; e. means to cause in a first mode of operation the conduction of current in the forward direction in said first semiconductor stage, the non-conduction of current in said second mentioned semiconductor stage and the storage of minority charges in said storing means; and in the alternative, said last mentioned means causing in a second mode of operation the non-conduction of current in the forward direction, and the conduction of current in the reverse direction in said first stage based on the Inverse Beta of said first semiconductor, the forward conduction of current in said second mentioned stage and the flow of charges from said storing means into said second mentioned stage, said flow of charges into said second mentioned stage and said reverse current causing its rapid turn-on in the forward direction, and said feedback means preventing said second mentioned stage from conducting into saturation; f. emitter follower means connected to the output of said second mentioned circuit stage.
Claim 2
Dependent Claim
232 words
The logic circuit consisting of, a. A first circuit stage comprising a first semiconductor device having a relative high Inverse Beta characteristic and including means for storing minority charges; b. means connected to the input of said first circuit stage for receiving logical input signals; c. another circuit stage comprising a second semiconductor device coupled to the output of said first mentioned stage; d. feedback means coupled across said second mentioned stage; e. means to cause in a first mode of operation the conduction of current in the forward direction in said first semiconductor stage, the non-conduction of current in said second mentioned semiconductor stage and the storage of minority charges in said storing means; and in the alternative, said last mentioned means causing in a second mode of operation the non-conduction of current in the forward direction, and the conduction of current in the reverse direction in said first stage based on the Inverse Beta of said first semiconductor, the forward conduction of current in said second mentioned stage and the flow of charges from said storing means into said second mentioned stage, said flow of charges into said second mentioned stage and said reverse current causing its rapid turn-on in the forward direction, and said feedback means preventing said second mentioned stage from conducting into saturation; f. emitter follower means connected to the output of said second mentioned circuit stage.
Claim 3
Dependent Claim
31 words
The circuit in accordance with claim 1 wherein said first and second stages include NPN transistors and said means for storing charges comprises the base-collector junction of said first stagE transistor.
Claim 4
Dependent Claim
24 words
The circuit in accordance with claim 2 wherein said feedback means comprises diode means connected across the base-collector junction of said second stage transistor.
Claim 5
Dependent Claim
16 words
The circuit in accordance with claim 3 wherein said diode means comprises a Schottky type diode.
Claim 6
Dependent Claim
31 words
The circuit in accordance with claim 2 wherein said feedback means comprises diode means connected across the base of said first stage transistor to the collector of said second stage transistor.
Claim 7
Dependent Claim
17 words
The circuit in accordance with claim 5 wherein said diode means comprises two diodes connected in series.
Claim 8
Dependent Claim
41 words
The circuit in accordance with claim 6 wherein said first diode connected to said base of said first stage transistor is a Schottky diode and said second diode connected to the collector of said second stage transistor is a silicon diode.
Claim 9
Dependent Claim
55 words
The circuit in accordance with claim 2 wherein said means connected to the input of said first circuit stage comprises NPN transistor stages which are connected in the emitter follower configuration to the input of said first stage transistor, said four stage circuit operating in the negative AND or in the positive OR logic configuration.
Claim 10
Dependent Claim
39 words
The circuit in accordance with claim 8 wherein one of said means coupled to said first and second stages for causing their conduction and non-conduction is a single power supply voltage which is connected to said four stage circuit.
Claim 11
Dependent Claim
31 words
The circuit in accordance with claim 2 wherein resistor means are further coupled between said first and second stages to ground potential wherein said resistor provides a minority carrier discharge path.
Claim 12
Dependent Claim
222 words
The logic circuit consisting of, a. a first circuit stage comprising a first semiconductor device; b. means connected to the input of said first stage for receiving logical input signals; c. another circuit stage comprising a second semiconductor device which is coupled to the output of said first stage; d. storage diode means coupled between said first and second mentioned stages for storing charges; e. feedback means coupled across said second mentioned stage; f. means including a single voltage supply level to cause in a first mode of operation the non-conduction of current in the first stage, the conduction of current in said second stage and the storage of charge in said means coupled between said first and second stages; and in the alternative, said last mentioned means causing in a second mode of operation the conduction of current in the forward direction in said first stage and the non-conduction of current in said second mentioned stage and the flow of current in the reverse direction through said means for storing charge and through said second semiconductor device, said flow of current in the reverse direction causing the rapid turn-off of the second semiconductor device and said feedback means preventing said mentioned second semiconductor stage from conducting into saturation; g. emitter follower means connected to the output of said second circuit stage.
Claim 13
Dependent Claim
222 words
The logic circuit consisting of, a. a first circuit stage comprising a first semiconductor device; b. means connected to the input of said first stage for receiving logical input signals; c. another circuit stage comprising a second semiconductor device which is coupled to the output of said first stage; d. storage diode means coupled between said first and second mentioned stages for storing charges; e. feedback means coupled across said second mentioned stage; f. means including a single voltage supply level to cause in a first mode of operation the non-conduction of current in the first stage, the conduction of current in said second stage and the storage of charge in said means coupled between said first and second stages; and in the alternative, said last mentioned means causing in a second mode of operation the conduction of current in the forward direction in said first stage and the non-conduction of current in said second mentioned stage and the flow of current in the reverse direction through said means for storing charge and through said second semiconductor device, said flow of current in the reverse direction causing the rapid turn-off of the second semiconductor device and said feedback means preventing said mentioned second semiconductor stage from conducting into saturation; g. emitter follower means connected to the output of said second circuit stage.
Claim 14
Dependent Claim
35 words
The circuit in accordance with claim 11 wherein said first stage includes a PNP transistor and said second stage includes an NPN transistor and said storage diode is connected intermediate said first and second stages.
Claim 15
Dependent Claim
38 words
The circuit in accordance with claim 12 wherein said means connected to the input of said first stage comprises NPN transistor stages which are connected in the emitter follower configuration to the input of said first stage transistor.
Claim 16
Dependent Claim
24 words
The circuit in accordance with claim 12 wherein said feedback means comprises a Schottky diode connected across the base-collector junction of said NPN transistor.
Claim 17
Dependent Claim
46 words
The combination in accordance with claim 12 wherein resistor means are coupled between said first and second stages to ground potential, said resistor providing a minority carrier discharge path after said second stage NPN transistor reverts to the non-conducting staTe after being in the conducting state.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-09-16 | 1978-03-18 | 1978-09-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-09-16 | 1982-03-18 | 1982-09-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-09-16 | 1986-03-18 | 1986-09-17 | $7700.00 | Window Closed / Lapsed |