Method and apparatus for testing printed wiring boards having integrated circuits

Claim 2

Apparatus for testing printed wiring boards having integrated circuit chips mounted thereon, each of said chips having a plurality of connector pins, said apparatus comprising: a plurality of voltage comparators each having first and second input leads, a strobe lead and an output lead, said comparators being divided into first and second groups; a multiconductor probe having a plurality of clips, each of said clips being connected to a corresponding one of said connector pins; means for connecting each of said clips to said first input lead of a corresponding one of said voltage comparators in said first group and to said second input lead of a corresponding one of said voltage comparators in said second group; a voltage source having first, second and third voltage output leads and first, second, third and fourth control leads, said first output lead of said source being connected to said second input lead of each of said comparators in said first group, said second output lead of said source being connected to said first input lead of each of said comparators in said second group; a sequencer having first, second, third and fourth output leads, each of said output leads of said sequencer being coupled to a corresponding one of said control leads of said source, said first output lead of said sequencer being coupled to said strobe lead of each of said comparators in said second group; and a plurality of indicating devices, each of said devices being coupled to said output leads of a corresponding one of said comparators in said first group and to a corresponding one of said comparators in said second group.

Claim 3

Apparatus for testing printed wiring boards as defined in claim 1 including: a plurality of bistabLe latches each having an input lead and an output lead, said input lead of each of said latches being connected to said output lead of a corresponding one of said comparators in said first group and to said output lead of a corresponding one of said comparators in said second group, said output lead of each of said latches being coupled to a corresponding one of said indicating devices.

Claim 4

Apparatus for testing printed wiring boards having integrated circuit chips mounted thereon, each of said chips having a plurality of connector pins, said apparatus comprising: a plurality of voltage comparators each having first and second input leads, a strobe lead and an output lead, said comparator being divided into first and second groups; a multiconductor probe having a plurality of clips, each of said clips being connected to a corresponding one of said connector pins; means for connecting each of said clips to said first input lead of a corresponding one of said voltage comparators in said first group and to said second input lead of a corresponding one of said voltage comparators in said second group; a voltage source having first, second and third voltage output leads and first, second, third and fourth control leads, said first output lead of said second being connected to said second input lead of each of said comparators in said first group, said second output lead of said source being connected to said first input lead of each of said comparators in said second group; a sequencer and first, second, third and fourth output leads, each of said output leads of said sequencer being coupled to a corresponding one of said control leads of said source, said first output lead of said sequencer being coupled to said strobe lead of each of said comparators in said second group; a plurality of timing circuits each having an input lead, an output lead and a control lead, said input lead of each of said timing circuits being coupled to said output lead of a corresponding one of said comparators in said first group and to said output lead of a corresponding one of said comparators in said second group, said control lead of each of said timing circuits being coupled to said third output lead of said source; a plurality of bistable latches each having an input lead and an output lead, said input lead of each of said latches being connected to said output lead of a corresponding one of said timing circuits; and a plurality of indicating devices, each of said devices being coupled to said output lead of a corresponding one of said latches.

Claim 5

Apparatus for testing printed wiring boards having integrated circuit chips mounted thereon, each of said chips having a plurality of connector pins, said apparatus comprising: a plurality of voltage comparators each having first and second input leads, a strobe lead and an output lead, said comparator being divided into first and second groups; a multiconductor probe having a plurality of clips, each of said clips being connected to a corresponding one of said connector pins; means for connecting each of said clips to said first input lead of a corresponding one of said voltage comparators in said first group and to said second input lead of a corresponding one of said voltage comparators in said second group; a voltage source having first, second and third voltage output leads and first, second, third and fourth control leads, said first output lead of said second being connected to said second input lead of each of said comparators in said first group, said second output lead of said source being connected to said first input lead of each of said comparators in said second group; a sequencer and first, second, third and fourth output leads, each of said output leads of said sequencer being coupled to a corresponding one of said control leads of said source, said first output lead of said sequencer being coupled to said strobe lead of each of said comparators in said second group; a plurality of timing circuits each having an input lead, an output lead and a control lead, said input lead of each of said timing circuits being coupled to said output lead of a corresponding one of said comparators in said first group and to said output lead of a corresponding one of said comparators in said second group, said control lead of each of said timing circuits being coupled to said third output lead of said source; a plurality of bistable latches each having an input lead and an output lead, said input lead of each of said latches being connected to said output lead of a corresponding one of said timing circuits; and a plurality of indicating devices, each of said devices being coupled to said output lead of a corresponding one of said latches.

Claim 6

Apparatus for testing printed wiring boards as defined in claim 3 including: a standard circuit chip having a plurality of input leads and a plurality of output leads, each of said input leads of said standard chip being connected to said output lead of a corresponding one of said voltage comparators in said first group; a plurality of exclusive OR-gates each having first and second input leads and an output lead, said first input lead of each of said OR-gates being connected to a corresponding one of said output leads of said standard chip, said second iinput lead of each of said OR-gates being coupled to said output lead of a corresponding one of said voltage comparators in said first group; and a logic gate having an output lead and a plurality of input leads, each of said input leads of said logic gate being connected to said output lead of a corresponding one of said OR-gates.

Claim 7

Apparatus for testing printed wiring boards as defined in claim 3 including: a plurality of standard circuit chips each having a plurality of input leads and a plurality of output leads, each of said input leads being connected to said output lead of a corresponding one of said voltage comparators in said first group; a plurality of exclusive OR-gates each having first and second input leads and an output lead, said OR-gates being divided into groups with each group corresponding tO one of said standard chips, said first input lead of each of said OR-gates in a group being connected to a corresponding one of said output leads of said standard chip in said corresponding group, said second input lead of each of said oR-gates being coupled to a said output lead of a corresponding one of said voltage comparators in said first group; a plurality of logic gates each having an output lead and a plurality of input leads, said input leads of each of said logic gates being connected to a corresponding one of said output leads of said OR-gates in a corresponding one of said groups; and gating means having an output lead and a plurality of input leads, each of said input leads of said gating means being connected to said output lead of a corresponding one of said logic gates.

Claim 8

Apparatus for testing printed wiring boards as defined in claim 3 including: a plurality of standard circuit chips each having a plurality of input leads and a plurality of output leads, each of said input leads being connected to said output lead of a corresponding one of said voltage comparators in said first group; a plurality of exclusive OR-gates each having first and second input leads and an output lead, said OR-gates being divided into groups with each group corresponding to one of said standard chips, said first input lead of each of said OR-gates in a group being connected to a corresponding one of said output leads of said standard chip in said corresponding group, said second input lead of each of said OR-gates being coupled to a said output lead of a corresponding one of said voltage comparators in said first group; a plurality of logic gates such having and output lead and a plurality of input leads, said input leads of each of said logic gates being connected to a corresponding one of said output leads of said OR-gates in a corresponding one of said groups; gating means having an output lead and a plurality of input leads, each of said input leads of said gating means being connected to said output lead of a corresponding one of said logic gates; a timing means having an input lead and an output lead, said input lead of said timing means being connected to said output lead of said gating means; a latching means having an input lead and an output lead, said input lead of said latching means being connected to said output lead of said timing means; and an alarm device, said device being coupled to said output lead of said latching means.

Claim 9

Apparatus for testing printed wiring boards having integrated circuit chips mounted thereon, each of said chips having a plurality of connector pins, said apparatus comprising: a plurality of voltage comparators each having first and second input leads, a strobe lead and an output lead, said comparators being divided into first and second groups; a multiconductor probe having a plurality of clips, each of said clips being connected to a corresponding one of said connector pins; means for connecting each of said clips to said first input lead of a corresponding one of said voltage comparators in said first group and to said second input lead of a corresponding one of said voltage comparators in said second group; a voltage source having first, second and third voltage output leads and first, second, third and fourth control leads, said first output lead of said source being connected to said second input lead of each of said comparators in said first group, said second output lead of said source being connected to said first input lead of each of said comparators in said second group; an oscillator having an output lead; first and second flip-flops each having first, second and third input leads and first and second output leads, said second input lead of said first flip-flop being coupled to said output lead of said oscillator, said first output lead of said first flip-flop being connected to said second control lead of said source, saiD second output lead of said first flip-flop being connected to said second input lead of said second flipflop and to said first and said third input leads of said first flip-flop, said second output lead of said first flip-flop being connected to said fourth control lead of said source, said first output lead of said second flip-flop being connected to said first control lead of said source, said second output lead of said second flip-flop being connected to said third control lead of said source and to said first and said third input leads of said second flip-flop; and a plurality of indicating devices, each of said devices being coupled to said output leads of a corresponding one of said comparators in said first group and to a corresponding one of said comparators in said second group.

Claim 10

Apparatus for testing printed wiring boards having integrated circuit chips mounted thereon, each of said chips having a plurality of connector pins, said apparatus comprising: a plurality of voltage comparators each having first and second input leads, a strobe lead and an output lead, said comparators being divided into first and second groups; a multiconductor probe having a plurality of clips, each of said clips being connected to a corresponding one of said connector pins; means for connecting each of said clips to said first input lead of a corresponding one of said voltage comparators in said first group and to said second input lead of a corresponding one of said voltage comparators in said second group; a voltage source having first, second and third voltage output leads and first, second, third and fourth control leads, said first output lead of said source being connected to said second input lead of each of said comparators in said first group, said second output lead of said source being connected to said first input lead of each of said comparators in said second group; an oscillator having an output lead; first and second flip-flops each having first, second and third input leads and first and second output leads, said second input lead of said first flip-flop being coupled to said output lead of said oscillator, said first output lead of said first flip-flop being connected to said second control lead of said source, saiD second output lead of said first flip-flop being connected to said second input lead of said second flipflop and to said first and said third input leads of said first flip-flop, said second output lead of said first flip-flop being connected to said fourth control lead of said source, said first output lead of said second flip-flop being connected to said first control lead of said source, said second output lead of said second flip-flop being connected to said third control lead of said source and to said first and said third input leads of said second flip-flop; and a plurality of indicating devices, each of said devices being coupled to said output leads of a corresponding one of said comparators in said first group and to a corresponding one of said comparators in said second group.

Claim 11

Apparatus for testing printed wiring boards as defined in claim 7 including: a plurality of bistable latches each having an input lead and an output lead, said input lead of each of said latches being connected to said output lead of a corresponding one of said comparators in said first group and to said output lead of a corresponding one of said comparators in said second group, said output lead of each of said latches being coupled to a corresponding one of said indicating devices.

Claim 12

Apparatus for testing printed wiring boards having integrated circuit chips mounted thereon, each of said chips having a plurality of connector pins, said apparatus comprising: a plurality of voltage comparators each having first and second input leads, a strobe lead and an output lead, said comparator being divided into first and second groups; a multiconductor probe having a plurality of clips, each of said clips being connected to a corresponding one of said connector pins; means for connecting each of said clips to said first input lead of a corresponding one of said voltage comparators in said first group and to said second input lead of a corresponding one of said voltage comparators in said second group; a voltage source having first, second and third voltage output leads and first, second, third and fourth control leads, said first output lead of said source being connected to said second input lead of each of said comparators in said first group, said second output lead of said source being connected to said first input lead of said comparators in said second group; an oscillator having an output lead; first and second flip-flops each having first, second and third input leads and first and second output leads, said second input lead of said first flip-flop being coupled to said output lead of said oscillator, said first output lead of said first flip-flop being connected to said second control lead of said source, said second output lead of said first flip-flop being connected to said second input lead of said second flip-flop and to said first and said third input leads of said first flip-flop, said second output lead of said first flip-flop being connected to said fourth control lead of said source, said first output lead of said second flip-flop being connected to said first control lead of said source, said second output lead of said second flip-flop being connected to said third control lead of said source and to said first and said third input leads of said second flip-flop; and a plurality of timing circuits each having an input lead, an output lead and a control lead, said input lead of each of said timing circuits being coupled to said output lead of a corresponding one of said comparators in said first group and to said output lead of a corresponding one of said comparators in said second group, said control lead of each of said timing circuits being coupled to said third output lead of said source; a plurality of bistable latches each having an input lead and an output lead, said input lead of each of said latches being connected to said output lead of a corresponding one of said timing circuits; and a plurality of indicatiNg devices, each of said devices being coupled to said output lead of a corresponding one of said latches.

Claim 13

Apparatus for testing printed wiring boards having integrated circuit chips mounted thereon, each of said chips having a plurality of connector pins, said apparatus comprising: a plurality of voltage comparators each having first and second input leads, a strobe lead and an output lead, said comparator being divided into first and second groups; a multiconductor probe having a plurality of clips, each of said clips being connected to a corresponding one of said connector pins; means for connecting each of said clips to said first input lead of a corresponding one of said voltage comparators in said first group and to said second input lead of a corresponding one of said voltage comparators in said second group; a voltage source having first, second and third voltage output leads and first, second, third and fourth control leads, said first output lead of said source being connected to said second input lead of each of said comparators in said first group, said second output lead of said source being connected to said first input lead of said comparators in said second group; an oscillator having an output lead; first and second flip-flops each having first, second and third input leads and first and second output leads, said second input lead of said first flip-flop being coupled to said output lead of said oscillator, said first output lead of said first flip-flop being connected to said second control lead of said source, said second output lead of said first flip-flop being connected to said second input lead of said second flip-flop and to said first and said third input leads of said first flip-flop, said second output lead of said first flip-flop being connected to said fourth control lead of said source, said first output lead of said second flip-flop being connected to said first control lead of said source, said second output lead of said second flip-flop being connected to said third control lead of said source and to said first and said third input leads of said second flip-flop; and a plurality of timing circuits each having an input lead, an output lead and a control lead, said input lead of each of said timing circuits being coupled to said output lead of a corresponding one of said comparators in said first group and to said output lead of a corresponding one of said comparators in said second group, said control lead of each of said timing circuits being coupled to said third output lead of said source; a plurality of bistable latches each having an input lead and an output lead, said input lead of each of said latches being connected to said output lead of a corresponding one of said timing circuits; and a plurality of indicatiNg devices, each of said devices being coupled to said output lead of a corresponding one of said latches.

Claim 14

Apparatus for testing printed wiring boards as defined in claim 9 including: a standard circuit chip having a plurality of input leads and a plurality of output leads, each of said input leads of said standard chip being connected to said output lead of a corresponding one of said voltage comparators in said first group; a plurality of exclusive OR-gates each having first and second input leads and an output lead, said first input lead of each of said OR-gates being connected to a corresponding one of said output leads of said standard chip, said second input lead of each of said OR-gates being coupled to said output lead of a corresponding one of said voltage comparators in said first group; and a logic gate having an output lead and a plurality of input leads, each of said input leads of said logic gate being connected to said output lead of a corresponding one of said OR-gates.

Claim 15

Apparatus for testing printed wiring boards as defined in claim 9 including: a plurality of standard circuit chips each having a plurality of input leads and a plurality of output leads, each of said input leads being connected to said output lead of a corresponding one of said voltage comparators in said first group; a plurality of exclusive OR-gates each having first and second input leads and an output lead, said OR-gates being divided into groups with each group corresponding to one of said standard chips, said first input lead of each of said OR-gates in a group being connected to a corresponding one of said output leads of said standard chip in said corresponding group, said second input lead of each of said OR-gates being coupled to a said output lead of a corresponding one of said voltage comparators in said first group; a plurality of logic gates each having an output lead and a plurality of input leads, said input leads of each of said logic gates being connected to a corresponding one of said output leads of said OR-gates in a corresponding one of said groups; and gating means having an output lead and a plurality of input leads, each of said input leads of said gating means being connected to said output lead of a corresponding one of said logic gates.