Abstract A synchronizing pulse delaying and shaping circuit includes an integration circuit, a clamping circuit, a differential amplifier and a reference power source. The clamping circuit includes a coupling capacitor and a diode. A synchronizing pulse is applied to the integration circuit, to be shaped into an integrated waveform. The intergrated signal has its DC component blocked by the coupling capacitor, and the resultant signal is superimposed on a reference voltage of the reference power source. The superimposed signal is partially clamped by the diode and the reference power source. Current flows through the diode in the forward direction, with the result that the coupling capacitor is discharged. When the peak level of the clamped signal is thus lowered to a predetermined value, the clamped signal voltage is compared with the reference voltage by the differential amplifier. Then, an output pulse is provided.
A synchronizing pulse delaying and shaping circuit, comprising a coupling capacitor having one end connected to an input terminal receiving an integrated input pulse, a differential amplifier having one input terminal connected to the other end of said coupling capacitor, a bias power source connected to another input terminal of said differential amplifier, and a parallel circuit which consists of a diode and a resistor connected between said one input terminal and said other input terminal of said differential amplifier.
Claim 2
Dependent Claim
80 words
A synchronizing pulse delaying and shaping circuit, comprising a coupling capacitor having one end connected to an input terminal receiving an integrated input pulse, a differential amplifier having one input terminal connected to the other end of said coupling capacitor, a bias power source connected to another input terminal of said differential amplifier, and a parallel circuit which consists of a diode and a resistor connected between said one input terminal and said other input terminal of said differential amplifier.
Claim 3
Dependent Claim
25 words
A synchronizing pulse delaying and shaping circuit as defined in claim 1, further including an integration circuit having its output connected to said input terminal.
Claim 4
Dependent Claim
48 words
A synchronizing pulse delaying and shaping circuit as defined in claim 2 wherein said integration circuit includes an inductor and a resistor connected in series to said one end of said coupling capacitor and a further capacitor connected between said one end of said coupling capacitor and ground.