US3832247A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for manufacturing integrated circuits
Assignee: Motorola Solutions Inc
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Filing: 1973-06-22
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Granted: 1974-08-27
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Expires: 1993-06-22
Abstract
Abstract A PROCESS OF MANUFACTURING INTEGRATED CIRCUITS, PARTICULARLY COMPLEMENTARY INTEGRATED CIRCUITS, IN AN N-TYPE SEMICONDUCTOR MATERIAL WHICH IS FORMED UPON AS INSULATING SUBSTRATE. THE PROCESS INCLUDES STEPS OF PATTERNING A DOPING OXIDE SUCH AS ALUMINUM OXIDE UPON THE SEMICONDUCTOR MATERIAL; FORMING A DIELECTRIC LAYER OVER THE SEMICONDUCTOR MATERIAL AND THE DOPING LAYER; AND THEN FORMING A POLYCRYSTALLINE SILICON HANDLE THEREON. FOLLOWING REMOVAL OF MOST OF THE ORIGINAL SEMICONDUCTOR MATERIAL, A HEATING STEP CAUSES AN UP-DIFFUSION FROM THE DOPING LAYER INTO AND THROUGH THE SEMICONDUCTOR BODY TO FORM P-TYO PE REGIONS OR TUBS, THEREIN.
Inventors
- 👤 I Saddler
- 👤 J Fisher
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 04:12
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/02; H10D84/03; H10D84/038; H10D99/00; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/141; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S148/00; Y10S148/085; Y10S148/098; Y10S148/151; Y10S438/00; Y10S438/967; Y10T; Y10T428/00; Y10T428/24; Y10T428/24479; Y10T428/24521
Claims Analysis
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References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-08-26 | 1978-02-25 | 1978-08-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-08-26 | 1982-02-25 | 1982-08-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-08-26 | 1986-02-25 | 1986-08-27 | $7700.00 | Window Closed / Lapsed |